CS8420-CS View Datasheet(PDF) - Cirrus Logic

Part Name

Description

MFG CO.

CS8420-CS

Digital Audio Sample Rate Converter

Cirrus Logic 

CS8420

8.2 Non-SRC Delay

The unit of delay depends on the frame rate (sample rate) Fs. The AES receiver has a interface delay of two

frames. The AES transmitter, the serial input port, and the serial output port each have an interface delay

of 1 frame. The ± 0.5 frame delay in the second half of the equation is due to the startup uncertainty of the

logic within the part.

1. All inputs are slaves and all outputs are masters, both with respect to the outside world.

2. The inputs and outputs are synchronous to one another.

Path

RX to TX

Serial Input to TX

RX to Serial Output

Serial Input to Serial Output

Delay (in units of a frame)

3 ± 1/128

2 ± 1/128

3 ± 1/128

2 ± 1/128

Table 3. Non-SRC Delay

DS245F4

29

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