CS8416-DSZR View Datasheet(PDF) - Cirrus Logic

Part Name

Description

MFG CO.

CS8416-DSZR

192 kHz Digital Audio Interface Receiver

Cirrus Logic 

CS8416

Gain,

dB

0

T1 =

50us

-10

T2

=15us

F1

3.183

F2

10.61

Frequency,

KHz

Figure 14. De-Emphasis Filter Response

14.5 Control3 (03h)

7

6

GPO1SEL3 GPO1SEL2

5

4

GPO1SEL1 GPO1SEL0

3

GPO2SEL3

2

GPO2SEL2

1

GPO2SEL1

GPO1SEL[3:0] – GPO1 Source select. See “General Purpose Outputs” on page 29.

Default = ‘0000’

GPO2SEL[3:0] – GPO2 Source select. See “General Purpose Outputs” on page 29.

Default = ‘0000’

0

GPO2SEL0

14.6 Control4 (04h)

7

6

RUN

RXD

5

RXSEL2

4

RXSEL1

3

RXSEL0

2

TXSEL2

1

TXSEL1

0

TXSEL0

RUN - Controls the internal clocks, allowing the CS8416 to be placed in a “powered down”, low current con-

sumption state.

Default = ‘0’

0 - Internal clocks are stopped. Internal state machines are reset. The fully static control port is

operational, allowing registers to be read or changed. Power consumption is low.

1 - Normal part operation. This bit must be written to the 1 state to allow the CS8416 to begin operation. All

input clocks should be stable in frequency and phase when RUN is set to 1.

RXD – RMCK Control

Default = ‘0’

0 -RMCK is an output, Clock is derived from input frame rate.

1 – RMCK becomes high impedance. The output of OSCLK, OLRCK, and SDOUT are indeterminate.

RX_SEL[2:0] – Selects RXP0 to RXP7 for input to the receiver

Default =’000’

000 – RXP0

001 – RXP1, etc

DS578F3

39

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