CS8920 View Datasheet(PDF) - Cirrus Logic
Part Name
Description
MFG CO.
CS8920 Datasheet PDF : 66 Pages
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CS8920 Technical Reference Manual
Bits 3-0: Reserved (set to 0)
3.3.4 Boot PROM Memory Base
Bits 15-4: 12 MSB of Memory Base
Address
The twelve most significant bits of the 24-
bit address locating the base of the
CS8920’s PacketPage memory. The lower
twelve bits are assumed to be 0. Default is
0.
Bits 3-0: Reserved (set to 0)
3.3.5 Boot PROM Mask
Bits 15-4: 12 MSB of Boot PROM
Addr. Mask
Twelve-bit Boot PROM address mask. The
lower twelve bits are assumed to be 0.
Refer to the CS8920 Data Sheet for a
discussion of the Boot PROM mask.
Default is 0.
Bits 3-0: Reserved (set to 0)
3.3.6 Transmission Control
Bit 15: Force Full Duplex
Force transmission in full duplex mode
(10Base-T only). Default is disabled.
Bits 14-10: Reserved (set to 0)
Bit 9: NLP Enable
Enable normal link pulses (10Base-T only).
In effect, this forces transmission in half
duplex mode. Default is disabled.
AN84REV1
Bit 8: AutoNeg Enable
Allow the CS8920 to auto-negotiate
between full duplex or half duplex if
connected to a hub capable of
autonegotiation (10Base-T only). Default
is enabled.
Bit 7: Allow FDX
Enable full duplex transmission if full
duplex capabilities are detected from
contents of fast link pulses. Default is
enabled.
Bit 6-0: Reserved (set to 0)
3.3.7 Adapter Configuration Word
Bit 15: Extended 10Base-2 Cable
Circuitry
Indicates the adapter has the required
circuitry to support operation over extended
length 10Base-2 cable. Default is not
present.
Bit 14: LoRx Squelch
Enable 10Base-T extended range feature
(reduce receive squelch threshold). Default
is disabled.
Bit 13: Polarity Correction Disable
Enable the CS8920 to automatically correct
the polarity of a connected 10Base-T
cable. Default is enabled.
Bits 12-11: Optimization Flags
Used to indicate the platform’s OS
configuration. Each driver configures the
CS8920 for optimum performance based on
the platform’s OS and driver architecture
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