datasheetbank_Logo
Integrated circuits, Transistor, Semiconductors Search and Datasheet PDF Download Site

CS7622-IQ View Datasheet(PDF) - Cirrus Logic

Part Name
Description
MFG CO.
CS7622-IQ
Cirrus-Logic
Cirrus Logic 
CS7622-IQ Datasheet PDF : 36 Pages
First Prev 21 22 23 24 25 26 27 28 29 30 Next Last
CS7622
Gain Calibration Offset 1
Default = 00h; Read only (address 0Eh)
Bit Number
Bit Name
Default
7
gain_offset
17
0
6
gain_offset
16
0
5
gain_offset
15
0
4
gain_offset
14
0
3
gain_offset
13
0
2
gain_offset
12
0
1
gain_offset
11
0
0
gain_offset
10
0
Bit
Mnemonic
Function
7:0
gain_offset17-10
offset added to 4x gain segment, values are in 2’s complement. See details in
register 10h.
Gain Calibration Offset 2
Default = 00h; Read only (address 0Fh)
Bit Number
Bit Name
Default
7
gain_offset
27
0
6
gain_offset
26
0
5
gain_offset
25
0
4
gain_offset
24
0
3
gain_offset
23
0
2
gain_offset
22
0
1
gain_offset
21
0
0
gain_offset
20
0
Bit
Mnemonic
Function
7:0
gain_offset27-20
offset added to 2x gain segment, values are in 2’s complement. See details in
register 10h.
Gain Calibration Offset 3
Default = 00h; Read only (address 10h)
Bit Number
Bit Name
Default
7
gain_offset
37
0
6
gain_offset
36
0
5
gain_offset
35
0
4
gain_offset
34
0
3
gain_offset
33
0
2
gain_offset
32
0
1
gain_offset
31
0
0
gain_offset
30
0
Bit
Mnemonic
Function
Offset added to 1x gain segment. Values are in 2’s complement.
These registers are used to report some of the calibration settings. After cali-
bration is performed the gain offset registers are automatically updated with val-
ues needed for the DRX circuitry to operate correctly. These registers should
not be written to since this will remove the proper settings found during calibra-
tion. The gain offset values are used to add an offset to the output of the ADC
when using different analog gain settings (See equations below). The purpose
7:0
gain_offset37-30 of this is to produce a continuous transition between the different gain settings
so that the final 13 bit output is monotonic and has no undesired artifacts. (See
Figure 17)
{ADC_out
if in the 8x gain segment}
dout[12:0] =
{ADC_out*2+Offset1
if in the 4x gain segment}
{ADC_out*4+Offset2*2 if in the 2x gain segment}
{ADC_out*8+Offset3*4 if in the 1x gain segment}
DS322PP1
23

Share Link: 

datasheetbank.com [ Privacy Policy ] [ Request Datasheet ] [ Contact Us ]