CS5541-BS View Datasheet(PDF) - Cirrus Logic

Part Name

Description

MFG CO.

CS5541-BS

Low-Power, Low-Voltage, 24-Bit ∆Σ ADC

Cirrus Logic 

CS5541

2.8 Command Register Quick Reference

D7(MSB) D6

D5

D4

D3

D2

D1

D0

CB

CH

PS

U/B

FS1

FS0

C1

C0

BIT

D7

D6

D5

D4

D3-D2

NAME

Command Bit, CB

Channel Select, CH

Power Save, PS

Notes 23, 24

Unipolar/Bipolar, U/B

Filter Select, FS1-FS0

Note 25

D1-D0

Conversion Calibration

Select, C1-C0

VALUE

0

1

0

1

0

1

0

1

00

01

10

11

00

01

10

11

FUNCTION

Reserved

Logic 1 for executable commands

Activate AIN1 for conversion

Activate AIN2 for conversion

Data Mode

Power Save Mode (Standby or Sleep)

Bipolar Conversion Mode

Unipolar Conversion Mode

Single Cycle Settling, 50/60 Hz Reject

Single Cycle Settling, No 50/60 Hz Reject

Four Cycle Settling, 50/60 Hz Reject

Four Cycle Settling, No 50/60 Hz Reject

Calibrate prior to each point

Perform a one time calibration

Use default calibration coefficients for conversions

Use existing calibration coefficients for conversion

Notes: 23. After entering a Power Save Mode, the user must wait a minimum of 2 system clocks before issuing a

convert command.

24. A Power Save Mode cannot be entered by selectively setting the D5 bit.

0xAX must be written to the command register before the Sleep Mode will be enabled.

Similarly, 0xBX must be written to the command register before the Standby Mode will be enabled.

25. If Four Cycle Settling is selected (D3 = ’1’), the part will perform a one-time calibration when continuous

calibration is chosen.

14

DS500PP1

Share Link: