CS5464-IS(2007) View Datasheet(PDF) - Cirrus Logic

Part Name

Description

MFG CO.

CS5464-IS
(Rev.:2007)

Three-channel, Single-phase Power/Energy IC

Cirrus Logic 

CS5464

8.3 Page 1 Registers

8.3.1 DC Offset for Current (I1OFF , I2OFF ) and Voltage (V1OFF , V2OFF )

Address: 0 (I1OFF), 2 (V1OFF), 7 (I2OFF), 9 (V2OFF)

MSB

LSB

-(20) 2-1

2-2

2-3

2-4

2-5

2-6

2-7

..... 2-17 2-18 2-19 2-20 2-21 2-22 2-23

Default = 0

DC offset registers I1OFF & V1OFF (I2OFF & V2OFF) are initialized to zero on reset. During DC offset calibration,

selected registers are written with the inverse of the DC offset measured. The application program can also write

the DC offset register values. These are two's complement values in the range of -1.0 ≤ value < 1.0, with the

binary point to the right of the MSB.

8.3.2 Gain for Current (I1GAIN , I2GAIN ) and Voltage (V1GAIN , V2GAIN )

Address: 1 (I1GAIN), 3 (V1GAIN), 8 (I2GAIN), 10 (V2GAIN)

MSB

LSB

21

20

2-1

2-2

2-3

2-4

2-5

2-6

..... 2-16 2-17 2-18 2-19 2-20 2-21 2-22

Default = 1.0

Gain registers I1GAIN & V1GAIN (I2GAIN & V2GAIN) are initialized to 1.0 on reset. During AC or DC gain calibration,

selected register are written with the multiplicative inverse of the gain measured. These are unsigned fixed-point

values in the range of 0 ≤ value < 4.0, with the binary point to the right of the second MSB.

8.3.3 Power Offset (P1OFF , P2OFF )

Address: 4 (P1OFF ), 11 (P2OFF )

MSB

LSB

-(20) 2-1

2-2

2-3

2-4

2-5

2-6

2-7

..... 2-17 2-18 2-19 2-20 2-21 2-22 2-23

Default = 0

Power offset P1OFF (P2OFF) is added to instantaneous power and averaged over a low-rate interval to yield

P1AVG (P2AVG) register results. It can be used to reduce systematic energy errors. These are two's complement

values in the range of -1.0 ≤ value < 1.0, with the binary point to the right of the MSB.

8.3.4 AC Offset for Current (I1ACOFF , I2ACOFF ) and Voltage (V1ACOFF , V2ACOFF )

Address: 5 (I1ACOFF), 6 (V1ACOFF), 12 (I2ACOFF), 13 (V2ACOFF)

MSB

LSB

-(20) 2-1

2-2

2-3

2-4

2-5

2-6

2-7

..... 2-17 2-18 2-19 2-20 2-21 2-22 2-23

Default = 0

AC offset registers I1ACOFF & V1ACOFF (VACOFF & V2ACOFF) are initialized to zero on reset. These are added to

the RMS results before being stored to the RMS result registers. They can be used to reduce systematic errors

in the RMS results. These are two's complement values in the range of -1.0 ≤ value < 1.0, with the binary point

to the right of the MSB.

DS682F1

33

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