CS5378
Bits
23:20
19:16
15:12
11:8
Selection
0000
0000
IIR2
IIR1
7:4
FIR2
3:0
FIR1
Bits 15:12
0000
0001
0010
0011
0100
IIR2 Coefficients
3 Hz @ 2000 SPS
3 Hz @ 1000 SPS
3 Hz @ 500 SPS
3 Hz @ 333 SPS
3 Hz @ 250 SPS
Bits 11:8
0000
0001
0010
0011
0100
IIR1 Coefficients
3 Hz @ 2000 SPS
3 Hz @ 1000 SPS
3 Hz @ 500 SPS
3 Hz @ 333 SPS
3 Hz @ 250 SPS
Bits 3:0
0000
0001
FIR1 Coefficients
Linear Phase
Minimum Phase
Bits 7:4
0000
0001
FIR2 Coefficients
Linear Phase
Minimum Phase
Figure 22. FIR and IIR Coefficient Set Selection Word
11.2.2 Output Word Rate
The CS5378 digital filter supports output word
rates (OWRs) between 4000 SPS and 1 SPS. The
output word rate is selected by the DEC bits in the
FILTCFG register.
When taking data directly from the SINC filter, the
decimation of the FIR1 and FIR2 stages is by-
passed and the actual output word rate is multiplied
by a factor of eight compared with the register se-
lection. When taking data directly from FIR1, the
decimation of the FIR2 stage is bypassed and the
actual output word rate is multiplied by a factor of
two. Data taken from the FIR2, IIR1, IIR2, or IIR3
filtering stages is output at the selected rate.
11.2.3 Digital Filter Clock
The digital filter clock rate is programmable be-
tween 8.192 MHz and 32 kHz by bits in the CON-
FIG register.
Computation Cycles
The minimum digital filter clock rate for a config-
uration depends on the computation cycles required
to complete digital filter convolutions at the select-
ed output word rate. All configurations work for a
maximum digital filter clock, but lower clock rates
consume less power.
Standby Mode
The CS5378 can be placed in a low-power standby
mode by sending the ‘Filter Stop’ configuration
command and programming the digital filter clock
to 32 kHz. In this mode the digital filter idles, con-
suming minimal power until re-enabled by later
configuration commands.
DS639F1
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