
DIGITAL CHARACTERISTICS (CONT.)
SYNC
MCLK
(2.048 MHz)
MSYNC
t0
MDATA
(512 kHz)
MFLAG
TDATA
(256 kHz)
Figure 4. System Timing Diagram
CS5373A
MCLK
(2.048 MHz)
MSYNC
MDATA
(2.048 MHz)
MFLAG
TDATA
(256 kHz)
tmss
tmsh
t0
tmsync
tmclk
tmdata
ttdata
Figure 5. MCLK / MSYNC Timing Detail
DS703F1
17