CS5368 View Datasheet(PDF) - Cirrus Logic
Part Name
Description
MFG CO.
CS5368 Datasheet PDF : 42 Pages
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CS5368
5.6 04h (HPF) High-Pass Filter Register
R/W
7
6
5
4
R/W
HPF8
HPF7
HPF6
HPF5
3
HPF4
2
HPF3
1
HPF2
0
HPF1
Default: 0x00, all high-pass filters enabled.
The High-Pass Filter Register is used to enable or disable a high-pass filter that exists for each channel.
These filters are used to perform DC offset calibration, a procedure that is detailed in “DC Offset Control”
on page 29.
5.7 05h Reserved
R/W
7
6
5
4
3
2
1
0
RESERVED
-
-
-
-
-
-
-
-
5.8 06h (PDN) Power Down Register
R/W
7
6
5
4
3
2
1
0
R/W
RESERVED
PDN-BG PDN-OSC PDN87
PDN65
PDN43
PDN21
Default: 0x00 - everything powered up
The Power Down Register is used as needed to reduce the chip’s power consumption.
Bit[7] RESERVED
Bit[6] RESERVED
Bit[5] PDN-BG When set, this bit powers-down the bandgap reference.
Bit[4] PDN-OSC controls power to the internal oscillator core. When asserted, the internal oscillator core is
shut down, and no clock is supplied to the chip. If the chip is running off an externally supplied clock at the
MCLK pin, it is also prevented from clocking the device internally.
Bit[3:0] PDN When any bit is set, all clocks going to a channel pair are turned off, and the serial data outputs
are forced to all zeroes.
5.9 07h Reserved
R/W
7
6
5
4
3
2
1
0
RESERVED
-
-
-
-
-
-
-
-
5.10 08h (MUTE) Mute Control Register
R/W
7
6
5
4
3
2
1
0
R/W
MUTE8
MUTE7
MUTE6
MUTE5
MUTE4
MUTE3
MUTE2
MUTE1
Default: 0x00, no channels are muted.
The Mute Control Register is used to mute or unmute the serial audio data output of individual channels.
When a bit is set, that channel’s serial data is muted by forcing the output to all zeroes.
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DS624F5
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