CDB5336,8,9
CONNECTOR
+15
-15
AGND
+5
DGND
AINL
AINR
EXTCLKIN
L/R
SDATA
SCLK
FSYNC
DIGITAL OUTPUT
P3
P1
INPUT/OUTPUT
input
input
input
input
input
input
input
input
output/input
output
output/input
output/input
output
output/input
output
SIGNAL PRESENT
+15 Volts from power supply
-15 Volts from power supply
analog ground connection from power supply
+5V for ADC VD+ and discrete logic
digital ground connection from power supply
left channel analog input
right channel analog input
external master clock input
left /right channel signal
serial output data
serial output clock
data framing signal
CS8402 digital output via transformer
CS8402 C,U,V inputs; CBL output
parallel output data
Table 1. System Connections
JUMPER
P6
PURPOSE
selects offset calibration
input source
P7
selects master clock source
for CS5326 CLKIN
P5
selects channel for serial to
parallel conversion
P2
P8, P9
selects L/R or DRDY as the
output status signal presented
on P1
selects optional input buffers
POSITION
AIN
*ZERO
*INT
EXT
*L
R
B
*DRDY
L/R
*IN
OUT
FUNCTION SELECTED
AINL and AINR selected during
offset calibration
ZEROL and ZEROR selected during
offset calibration
CLKIN provided by U3
CLKIN provided by EXTCLKIN BNC
left channel data presented on P1
right channel data presented on P1
left then right channel data
alternately presented on P1
DRDY selected to signal the arrival of
new data for the selected channel
L/R selected
Buffer amplifier in circuit
Buffer amplifier bypassed
P4
selects device type
5337/39
5336/38
Correct SCLK for CS5337 & CS5339
Correct SCLK for CS5336 & CS5338
* Default setting from factory
Table 2. Jumper Selectable Options
DS23DB5
3-67