
CS4953xx Data Sheet
32-bit Audio Decoder DSP Family
PCP_A[3:0]
t iah
PCP_D[7:0]
t ias
PCP_CS#
LSP
t idd t idhr
t icdr
PCP_WR#
t idis
t irpw
t ird
MSP
t irdtw
PCP_RD#
PCP_IRQ#
tirdirqh
Figure 7. Parallel Control Port - Intel® Mode Read Cycle
Y PCP_A[3:0]
R PCP_D[7:0]
A PCP_CS#
IN PCP_RD#
PCP_WR#
PRELIM PCP_BSY#
t iah
t ias
t icdw
LSP
t idhw
t iwpw
t idsu
t iwd
MSP
tiwrbsyl
Figure 8. Parallel Control Port - Intel Mode Write Cycle
t iwtrd
DS705PP3
Copyright 2008 Cirrus Logic
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