CS4350-CZZ(2006) View Datasheet(PDF) - Cirrus Logic

Part Name

Description

MFG CO.

CS4350-CZZ
(Rev.:2006)

192 kHz Stereo DAC with Integrated PLL

Cirrus Logic 

8.7.3

CS4350

Popguard Enable (POPG_EN) Bit 4

Function:

When set to 1, (default) the Device will initiate a ramping function as outlined in Section 4.7 on page 21.

When set to 0, the outputs will step to VQ upon release of PDN.

8.7.4

RMCK control (RMCK_CTR[1:0]) Bits 3:2

Default = 00

RMCK_CTR1

0

0

1

1

RMCK_CTR0

0

1

0

1

Mode

256x LRCK for 48 kHz and 96 kHz, 128x @ 192kHz

512x @ 48kHz, 256x @ 96 kHz, 128x @ 192kHz

Manual control (see RMCK_RATIO)

RMCK off

Function: These bits set the function of the RMCK pin with respect to the LRCK.

8.7.5

RMCK Ratio Select (R_SELECT[1:0]) Bits 2:1

Default = 00

Function: To select the RMCK-to-LRCK ratio.

R_SELECT1

0

0

1

1

R_SELECT0

0

1

0

1

RMCK/LRCK Ratio

512

256

128

64

Note: RMCK_CTR must be set to 10 to enable this function. Please note the maximum RMCK output

frequency as specified in the ”Switching Specifications - Serial Audio Interface” on page 12.

34

DS691A3

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