CS4334-DSZ View Datasheet(PDF) - Cirrus Logic

Part Name

Description

MFG CO.

CS4334-DSZ

8-Pin, 24-Bit, 96 kHz Stereo D/A Converter

Cirrus Logic 

Confidential Draft

3/11/08

CS4334/5/8/9

LRCK

SCLK

Left Channel

Right Channel

SDATA

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

32 clocks

Internal SCLK Mode

Right Justified, 16-Bit Data

INT SCLK = 32 Fs if MCLK/LRCK = 512, 256 or 128

INT SCLK = 48 Fs if MCLK/LRCK = 384 or 192

External SCLK Mode

Right Justified, 16-Bit Data

Data Valid on Rising Edge of SCLK

SCLK Must Have at Least 32 Cycles per LRCK Period

LRCK

SCLK

Figure 12. CS4338 Data Format

Left Channel

Right Channel

SDATA 1 0

17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

32 clocks

Internal SCLK Mode

Right Justified, 18-Bit Data

INT SCLK = 64 Fs if MCLK/LRCK = 512, 256 or 128

INT SCLK = 48 Fs if MCLK/LRCK = 384 or 192

External SCLK Mode

Right Justified, 18-Bit Data

Data Valid on Rising Edge of SCLK

SCLK Must Have at Least 36 Cycles per LRCK Period

Figure 13. CS4339 Data Format

16

DS248F5

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