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CPC7582MATR View Datasheet(PDF) - Clare Inc => IXYS

Part Name
Description
MFG CO.
CPC7582MATR
Clare
Clare Inc => IXYS 
CPC7582MATR Datasheet PDF : 19 Pages
First Prev 11 12 13 14 15 16 17 18 19
CPC7582
3.2 Printed-Circuit Board Land Patterns
3.2.1 16-Pin SOIC
1.27
(0.050)
3.2.2 16-Pin DFN
0.35
(0.014)
2.00
(0.079)
9.40
(0.370)
1.05
(0.041)
5.80
(0.228)
0.60
(0.024)
DIMENSIONS
mm
(inches)
0.80
(0.031)
DIMENSIONS
mm
(inches)
NOTE: Because the metallic pad on the bottom of the
DFN package is connected to the substrate of the die,
Clare recommends that no printed circuit board traces
or vias be placed under this area to maintain minimum
creepage and clearance values.
3.3 Tape and Reel Packaging
3.3.1 16-Pin SOIC
Tape and Reel Packaging for 16-Pin SOIC Package
330.2 Dia
(13.00 Dia)
Pin 1
B0=10.70 + 0.15
(0.421 + 0.01)
Top Cover
Tape Thickness
0.102 Max
(0.004 Max)
Top Cover
Tape
W=16.00 + 0.30
(0.630 + 0.010)
Embossed
Carrier
Embossment
K0=3.20 + 0.15
(0.193 + 0.01)
K =2.70 + 0.15
1
(0.106 + 0.01)
P=12.00
(0.47)
User Direction of Feed
A0=10.90 + 0.15
(0.429 + 0.010)
Dimensions
mm
(inches)
NOTE: Tape dimensions not shown comply with JEDEC Standard EIA-481-2
18
www.clare.com
R05

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