CL-PS6700
Low-Power PC Card Controller
INDEX
Numerics
100-pin VQFP
package specifications 43
pin diagram 7
M
Memory bus 18
Memory or Register Write bus operation. See bus
operations
A
abbreviations 5
absolute maximum ratings 33
acronyms 5
B
bus operations
Memory or Register Write 38
PC Card Bus DMA Transaction 42
PC Card Bus Read 40
PC Card Bus Write 41
Register Read 38
Standby Mode Timing 42
System Bus Card Data Read 39
C
card read 12
card write 12
conventions
abbreviations 5
acronyms 5
numbers and units 6
D
data buffering 18
DC specifications 34
E
electrical specifications 33
endianness conversion 18–19
F
functional description 18
I
I/O properties 31
interface signals
Access Control 12–14, 16–17
Address/Data Bus 10
Interrupt and Abort 13, 16
PC Card 14
interrupt control 18
O
ordering information 44
P
PC Card
access types 15
address spaces 18
address/data bus 18
byte assembly/disassembly 19
card types 18
configuration 19
DMA controller 18
hot insertion support 19
insertion 19
queueing 19
removal 19
PC Card (PCMCIA) Interface 18
PC Card Bus DMA Transaction bus operation. See bus
operations
PC Card Bus Read bus operation. See bus operations
PC Card Bus Write bus operation. See bus operations
pins
alphabetical listing 8
description 10–17
diagram 7
ground and power 17
MD[15:0] 10, 10
numerical listing 9
PCE_L 12, 13, 14, 16, 17
PCLK 14
PCM_ IOWR_L 16
PCM_A[25:0] 14
PCM_BVD[2:1] 16
PCM_CD_L[2:1] 16
PCM_CE_L[2:1] 14
PCM_D[15:0] 14
PCM_IORD_L 16
PCM_OE_L 14
PCM_RDY 15
PCM_REG_L 15
PCM_RESET 17
PCM_VS[2:1] 17
PCM_WAIT_L 15
PCM_WE_L 14
PCM_WP 15
46
INDEX
CIRRUS LOGIC CONFIDENTIAL, NDA REQUIRED
PRELIMINARY DATA BOOK v1.0
November 1997