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CS42L51(2005) View Datasheet(PDF) - Cirrus Logic

Part Name
Description
MFG CO.
CS42L51
(Rev.:2005)
Cirrus-Logic
Cirrus Logic 
CS42L51 Datasheet PDF : 83 Pages
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4.3.8
CS42L51
Noise Gate
The noise gate may be used to mute signal levels that fall below a programmable threshold. This prevents
the ALC from applying gain to noise. A programmable delay may be used to set the minimum time before
the noise gate attacks the signal.
*Maximum noise gate attenuation levels will depend on the gain applied in either the PGA or MIC pre-
amplifier. For example: If both +32 dB pre-amplification and +12 dB programmable gain is applied, the
maximum attenuation that the noise gate achieves will be 52 dB (-96 + 32 + 12) below full-scale.
Ramp down time to the maximum setting is affected by the SOFTx bit.
Recommended settings: For best results, enable soft ramp for the digital attenuator. When the analog in-
puts are configured for differential signals (see “Differential Inputs” on page 29), enable the NG_ALL bit
to trigger the noise gate only when both inputs fall below the threshold.
Software
Controls:
“Noise Gate Configuration & Misc. (Address 1Fh)” on page 70, “ADC Control (Address 06h)” on
page 52.
Output
(dB)
NGEN=1
-52 dB
NGEN=0
-64 dB
-80 dB
-96
-40
THRESH[2:0]
Input (dB)
Figure 13. Noise Gate Attenuation
32
DS679A2

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