C8051F91X-C8051F90X View Datasheet(PDF) - Silicon Laboratories
Part Name
Description
MFG CO.
C8051F91X-C8051F90X
Silicon Laboratories
C8051F91X-C8051F90X Datasheet PDF : 318 Pages
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C8051F91x-C8051F90x
SFR Definition 24.3. SPInCKR: SPI Clock Rate
Bit
7
6
5
4
3
2
1
0
Name
SCRn[7:0]
Type
R/W
Reset
0
0
0
0
0
0
0
0
SFR Addresses: SPI0CKR = 0xA2, SPI1CKR = 0x85
SFR Pages: SPI0CKR = 0x0, SPI1CKR = 0x0
Bit
Name
Function
7:0
SCRn SPI Clock Rate.
These bits determine the frequency of the SCK output when the SPI module is
configured for master mode operation. The SCK clock frequency is a divided
version of the system clock, and is given in the following equation, where SYSCLK
is the system clock frequency and SPInCKR is the 8-bit value held in the SPInCKR
register.
fSCK
=
-------------------S---Y----S----C----L---K---------------------
2 SPInCKR[7:0] + 1
for 0 <= SPI0CKR <= 255
Example: If SYSCLK = 2 MHz and SPInCKR = 0x04,
fSCK
=
---2---0---0---0---0---0---0----
2 4 + 1
fSCK = 200kHz
Rev. 1.0
265
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