C8051T603-GS(2007) View Datasheet(PDF) - Silicon Laboratories

Part Name

Description

MFG CO.

C8051T603-GS
(Rev.:2007)

Mixed Signal OTP EPROM MCU Family

Silicon Laboratories 

C8051T600/1/2/3/4/5

1.2. On-Chip Memory

The CIP-51 has a standard 8051 program and data address configuration. It includes 256 bytes of data

RAM, with the upper 128 bytes dual-mapped. Indirect addressing accesses the upper 128 bytes of general

purpose RAM, and direct addressing accesses the 128 byte SFR address space. The lower 128 bytes of

RAM are accessible via direct and indirect addressing. The first 32 bytes are addressable as four banks of

general purpose registers, and the next 16 bytes can be byte addressable or bit addressable.

The C8051T600/1 include 8 kB of EPROM program memory, the C8051T602/3 include 4 kB, and the

C8051T604/5 include 2 kB. See Figure 1.4 for the C8051T600/1 system memory map.

PROGRAM MEMORY

0x1E00

0x1DFF

RESERVED

8k bytes

OTP Memory

0x0000

0xFF

0x80

0x7F

0x30

0x2F

0x20

0x1F

0x00

DATA MEMORY

INTERNAL DATA ADDRESS SPACE

Upper 128 RAM

(Indirect Addressing

Only)

Special Function

Register's

(Direct Addressing Only)

(Direct and Indirect

Addressing)

Bit Addressable

General Purpose

Registers

Lower 128 RAM

(Direct and Indirect

Addressing)

Figure 1.4. On-chip Memory Map (C8051T600/1 shown)

1.3. On-Chip Debug Circuitry and Code Development Options

The C8051T600/1/2/3/4/5 devices include on-chip Silicon Labs 2-Wire (C2) debug circuitry that provides

non-intrusive, full speed, in-circuit debugging of the production part installed in the end application.

Silicon Labs' debugging system supports inspection and modification of memory and registers, break-

points, and single stepping. No additional target RAM, program memory, timers, or communications chan-

nels are required. All the digital and analog peripherals are functional and work correctly while debugging.

All the peripherals (except for the ADC and SMBus) are stalled when the MCU is halted, during single

stepping, or at a breakpoint in order to keep them synchronized.

The C8051F300 MCU can be used to quickly develop code for a system using a device in the C8051T600/

1/2/3/4/5 family. The C8051F300 is an In-System Programmable, Flash-based device that uses the same

pinout as the C8051T600/1/2/3/4/5 devices, and can run code written for the C8051T600/1/2/3/4/5. The

C8051T600DK development kit provides all the hardware and software necessary to develop application

code and perform in-circuit debugging for the C8051T600/1/2/3/4/5 MCUs. The kit includes software with a

developer's studio and debugger, an assembler/linker and evaluation ‘C’ compiler, and the necessary

cables for connection to the target board or the end-system. The development kit includes an SOIC Socket

Daughter Card for programming SOIC devices, samples of the C8051T600-GS, and a C8051F300 Emula-

tion Daughter Card for rapid code development. An AC to DC wall adapter is supplied for powering the

board.

18

Rev. 0.5

Share Link: