C8051F38C-GMR View Datasheet(PDF) - Silicon Laboratories
Part Name
Description
MFG CO.
C8051F38C-GMR Datasheet PDF : 321 Pages
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C8051F380/1/2/3/4/5/6/7/C
27.3.2. Software Timer (Compare) Mode
In Software Timer mode, the PCA counter/timer value is compared to the module's 16-bit capture/compare
register (PCA0CPHn and PCA0CPLn). When a match occurs, the Capture/Compare Flag (CCFn) in
PCA0CN is set to logic 1. An interrupt request is generated if the CCFn interrupt for that module is
enabled. The CCFn bit is not automatically cleared by hardware when the CPU vectors to the interrupt ser-
vice routine, and must be cleared by software. Setting the ECOMn and MATn bits in the PCA0CPMn regis-
ter enables Software Timer mode.
Important Note About Capture/Compare Registers: When writing a 16-bit value to the PCA0 Cap-
ture/Compare registers, the low byte should always be written first. Writing to PCA0CPLn clears the
ECOMn bit to 0; writing to PCA0CPHn sets ECOMn to 1.
Write to
PCA0CPLn
0
Reset
ENB
Write to
PCA0CPHn ENB
1
PCA0CPMn
PECCMT PE
WC A A A O WC
MO P P T GMC
1 MPN n n n F
6nnn
n
n
x 00 00x
Enable
PCA0CPLn PCA0CPHn
PCA Interrupt
PCA0CN
CC CCCCC
FR CCCCC
FFFFF
43210
16-bit Comparator
Match
0
1
PCA
Timebase
PCA0L
PCA0H
Figure 27.5. PCA Software Timer Mode Diagram
Rev. 1.4
303
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