C8051F38C-GMR View Datasheet(PDF) - Silicon Laboratories
Part Name
Description
MFG CO.
C8051F38C-GMR Datasheet PDF : 321 Pages
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C8051F380/1/2/3/4/5/6/7/C
SFR Definition 26.2. CKCON1: Clock Control 1
Bit
7
6
5
4
3
2
1
0
Name
T5MH
T5ML
T4MH
T4ML
Type
R
R
R
R
R/W
R/W
R/W
R/W
Reset
0
0
0
0
0
0
0
0
SFR Address = 0xE4; SFR Page = F
Bit Name
Function
7:4 Unused Read = 0000b; Write = don’t care
3 T5MH Timer 5 High Byte Clock Select.
Selects the clock supplied to the Timer 5 high byte (split 8-bit timer mode only).
0: Timer 5 high byte uses the clock defined by the T5XCLK bit in TMR5CN.
1: Timer 5 high byte uses the system clock.
2 T5ML Timer 5 Low Byte Clock Select.
Selects the clock supplied to Timer 5. Selects the clock supplied to the lower 8-bit timer
in split 8-bit timer mode.
0: Timer 5 low byte uses the clock defined by the T5XCLK bit in TMR5CN.
1: Timer 5 low byte uses the system clock.
1 T4MH Timer 4 High Byte Clock Select.
Selects the clock supplied to the Timer 4 high byte (split 8-bit timer mode only).
0: Timer 4 high byte uses the clock defined by the T4XCLK bit in TMR4CN.
1: Timer 4 high byte uses the system clock.
0 T4ML Timer 4 Low Byte Clock Select.
Selects the clock supplied to Timer 4. If Timer 4 is configured in split 8-bit timer mode,
this bit selects the clock supplied to the lower 8-bit timer.
0: Timer 4 low byte uses the clock defined by the T4XCLK bit in TMR4CN.
1: Timer 4 low byte uses the system clock.
Rev. 1.4
265
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