AT89C5122D-RDRUM View Datasheet(PDF) - Atmel Corporation
Part Name
Description
MFG CO.
AT89C5122D-RDRUM Datasheet PDF : 208 Pages
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AT83R5122, AT8xC5122/23
Table 6. Auxiliary Register 1 AUXR1- (0A2h) for AT8xC5122
7
6
5
4
3
2
-
-
ENBOOT
-
GF3
0
1
0
-
DPS
Bit
Bit
Number Mnemonic Description
7-6
-
Reserved
The value read from this bit is indeterminate. Do not change these bits.
Enable Boot ROM (CRAM / E2PROM version only)
Set this bit to map the Boot ROM from 8000h to FFFFh. If the PC increments
beyond 7FFFh address, the code is fetch from internal ROM
5
ENBOOT
Clear this bit to disable Boot ROM. If the PC increments beyond 7FFFh address,
the code is fetch from external code memory (C51 standard roll over function)
This bit is forced to 1 at reset
4
-
Reserved
The value read from this bit is indeterminate. Do not change this bit.
3
GF3 This bit is a general-purpose user flag.
2
0
Always cleared.
1
-
Reserved
The value read from this bit is indeterminate. Do not change this bit.
0
DPS
Data Pointer Selection
Cleared to select DPTR0. Set to select DPTR1.
Reset Value = XX1X XX0X0b (Not bit addressable)
Table 7. Auxiliary Register 1 AUXR1- (0A2h) for AT83C5123
7
6
5
4
3
2
-
-
-
-
GF3
0
1
0
-
DPS
Bit
Bit
Number Mnemonic Description
7-6
-
Reserved
The value read from this bit is indeterminate. Do not change these bits.
5
Reserved
The value read from this bit is indeterminate. Do not change these bits.
4
-
Reserved
The value read from this bit is indeterminate. Do not change this bit.
3
GF3 This bit is a general-purpose user flag.
2
0
Always cleared.
1
-
Reserved
The value read from this bit is indeterminate. Do not change this bit.
Data Pointer Selection
0
DPS Cleared to select DPTR0.
Set to select DPTR1.
Reset Value = XXXX XX0X0b (Not bit addressable)
23
4202F–SCR–07/2008
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