LTC1289CCSW(RevB) View Datasheet(PDF) - Linear Technology
Part Name
Description
MFG CO.
LTC1289CCSW Datasheet PDF : 28 Pages
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LTC1289
APPLICATI S I FOR ATIO
Logic Levels
The logic level standards for this supply range have not
been well defined. What standards that do exist are not
universally accepted. The trip point on the logic inputs of
the LTC1289 is 0.28 × VCC. This makes the logic inputs
compatible with HC type logic levels and processors that
are specified at 3.3V. The output DOUT is also compatible
with the above standards. The following summarizes such
levels.
VOH (no load)
VOL (no load)
VOH
VOL
VIH
VIL
VCC - 0.1V
0.1V
0.9 × VCC
0.1 × VCC
0.7 × VCC
0.2 × VCC
The LTC1289 can be driven with 5V logic even when VCC
is at 3.3V. This is due to a unique input protection device
that is found on the LTC1289.
Microprocessor Interfaces
The LTC1289 can interface directly (without external hard-
ware) to most popular microprocessor (MPU) synchro-
nous serial formats. If an MPU without a serial interface is
used, then four of the MPU’s parallel port lines can be
programmed to form the serial link to the LTC1289. Many
of the popular MPU's can operate with 3V supplies. For
example the MC68HC11 is an MPU with a serial format
(SPI). Likewise parallel MPU’s that have the 8051 type
architecture are also capable of operating at this voltage
range. The code for these processors remains the same
and can be found in the LTC1290 datasheet or application
notes AN36A and AN36B.
Sharing the Serial Interface
The LTC1289 can share 3-wire serial interface with other
peripheral components or other LTC1289s (See Figure 5).
In this case, the CS signals decide which LTC1289 is being
addressed by the MPU.
ANALOG CONSIDERATIONS
1. Grounding
The LTC1289 should be used with an analog ground plane
and single point grounding techniques.
Pin 11 (AGND) should be tied directly to this ground plane.
Pin 10 (DGND) can also be tied directly to this ground
plane because minimal digital noise is generated within
the chip itself.
Pin 20 (VCC) should be bypassed to the ground plane with a
22µF tantalum with leads as short as possible. Pin 12 (V–)
should be bypassed with a 0.1µF ceramic disk. For single
supply applications, V– can be tied to the ground plane.
It is also recommended that pin 13 (REF –) and pin 9 (COM)
be tied directly to the ground plane. All analog inputs
should be referenced directly to the single point ground.
Digital inputs and outputs should be shielded from and/or
routed away from the reference and analog circuitry.
21 0
OUTPUT PORT
SERIAL DATA
MPU
3
3
CS
LTC1289
3
CS
LTC1289
3
CS
LTC1289
3-WIRE SERIAL
INTERFACE TO OTHER
PERIPHERALS OR LTC1289s
8 CHANNELS 8 CHANNELS 8 CHANNELS
Figure 5. Several LTC1289s Sharing One 3-Wire Serial Interface
LTC1289 AIF05
1289fb
15
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