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CS5322-BL(2005) View Datasheet(PDF) - Cirrus Logic

Part Name
Description
MFG CO.
CS5322-BL
(Rev.:2005)
Cirrus-Logic
Cirrus Logic 
CS5322-BL Datasheet PDF : 36 Pages
First Prev 31 32 33 34 35 36
CS5321/22
4. CS5322 PIN DESCRIPTIONS
CHIP SELECT
CS
FRAME SYNC SYNC
CLOCK INPUT CLKIN
RESET RESET
MODULATOR SYNC MSYNC
MODULATOR FLAG MFLG
MODULATOR CLOCK MCLK
POSITIVE DIGITAL POWER VD+
DIGITAL GROUND DGND
MODULATOR DATA MDATA
TEST DATA TDATA
CHANNEL SELECT CSEL
HARDWARE/SOFTWARE MODE H/S
POWER DOWN PWDN
5 4 3 2 1 28 27 2 6 25
6
CS5322 24
7
23
8
TOP
22
9
VIEW
21
10
20
11
19
12 13 14 15 16 17 18
R/W READ/WRITE
RSEL REGISTER SELECT
SCLK SERIAL CLOCK
SID SERIAL INPUT DATA
SOD SERIAL OUTPUT DATA
ERROR ERROR FLAG
DRDY DATA READY
VD+ POSITIVE DIGITAL POWER
DGND DIGITAL GROUND
ORCAL OFFSET CALIBRATION
DECA DECIMATION RATE CONTROL
DECB DECIMATION RATE CONTROL
DECC DECIMATION RATE CONTROL
USEOR USE OFFSET REGISTER
Power Supplies
VD+ – Positive Digital Power, Pin 8, 21
Positive digital supply voltage. Nominally +5 volts.
DGND – Digital Ground, Pin 9, 20
Digital ground reference.
Digital Outputs
MCLK – Modulator Clock Output, Pin 7
A CMOS-compatible clock output (nominally 1.024 MHz) that provides the necessary clock for
operation of the modulator.
MSYNC – Modulator Sync, Pin 5
The transition from a low to high level on this output will re-initialize the CS5321.
ERROR - Error Flag, Pin 23
This signal is the output of an open pull-up NOR gate with a nominal 100 kpull-up resistor
to which the error status data (OVERWRITE error, MFLG error, ACC1 error and ACC2 error)
are inputs. When low, it notifies the host processor that an error condition exists. The ERROR
signal can be wire OR’d together with other filters’ outputs. The value of the internal pull-up
resistor is 100 k.
DRDY - Data Ready, Pin 22
When high, data is ready to be shifted out of the serial port data register.
DS454F2
31

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