
STM32F405xx, STM32F407xx
Pinouts and pin description
Pin number
Table 7. STM32F40x pin and ball definitions (continued)
Pin name
(function after
reset)(1)
Alternate functions Additional functions
- - 84 117 D11 145
- A4 85 118 D10 146
- C6 86 119 C11 147
- - - 120 D8 148
- - - 121 C8 149
- B5 87 122 B11 150
- A5 88 123 A11 151
- - - 124 C10 152
- - - 125 B10 153
- - - 126 B9 154
- - - 127 B8 155
- - - 128 A8 156
- - - 129 A7 157
PD3
PD4
PD5
VSS
VDD
PD6
PD7
PG9
PG10
PG11
PG12
PG13
PG14
I/O FT
I/O FT
I/O FT
S
S
I/O FT
I/O FT
I/O FT
I/O FT
I/O FT
I/O FT
I/O FT
I/O FT
FSMC_CLK/
USART2_CTS/
EVENTOUT
FSMC_NOE/
USART2_RTS/
EVENTOUT
FSMC_NWE/USART2_TX
/ EVENTOUT
FSMC_NWAIT/
USART2_RX/ EVENTOUT
USART2_CK/FSMC_NE1/
FSMC_NCE2/
EVENTOUT
USART6_RX /
FSMC_NE2/FSMC_NCE3
/ EVENTOUT
FSMC_NCE4_1/
FSMC_NE3/ EVENTOUT
FSMC_NCE4_2 /
ETH_MII_TX_EN/
ETH _RMII_TX_EN/
EVENTOUT
FSMC_NE4 /
USART6_RTS/
EVENTOUT
FSMC_A24 /
USART6_CTS
/ETH_MII_TXD0/
ETH_RMII_TXD0/
EVENTOUT
FSMC_A25 / USART6_TX
/ETH_MII_TXD1/
ETH_RMII_TXD1/
EVENTOUT
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