
STM32F405xx, STM32F407xx
Pinouts and pin description
Pin number
Table 7. STM32F40x pin and ball definitions (continued)
Pin name
(function after
reset)(1)
Alternate functions Additional functions
11 E9 18 29 M5 35
- - 19 30 G3 36
12 H10 20 31 M1 37
- - - - N1 -
- - 21 32 P1 38
13 G9 22 33 R1 39
14 C10 23 34 N3 40
15 F8 24 35 N2 41
16 J10 25 36 P2 42
- - - - F4 43
- - - - G4 44
- - - - H4 45
- - - - J4 46
PC3
VDD
VSSA
VREF–
VREF+
VDDA
PA0/WKUP
(PA0)
PA1
PA2
PH2
PH3
PH4
PH5
I/O FT
S
S
S
S
S
I/O FT
I/O FT
I/O FT
I/O FT
I/O FT
I/O FT
I/O FT
SPI2_MOSI / I2S2_SD /
(4) OTG_HS_ULPI_NXT /
ETH_MII_TX_CLK/
EVENTOUT
ADC123_IN13
USART2_CTS/
UART4_TX/
(5)
ETH_MII_CRS /
TIM2_CH1_ETR/
ADC123_IN0/WKUP(4
)
TIM5_CH1 / TIM8_ETR/
EVENTOUT
USART2_RTS /
UART4_RX/
(4) ETH_RMII_REF_CLK /
ETH_MII_RX_CLK /
TIM5_CH2 / TIM2_CH2/
EVENTOUT
ADC123_IN1
USART2_TX/TIM5_CH3 /
(4) TIM9_CH1 / TIM2_CH3 /
ETH_MDIO/ EVENTOUT
ADC123_IN2
ETH_MII_CRS/EVENTOU
T
ETH_MII_COL/EVENTOU
T
I2C2_SCL /
OTG_HS_ULPI_NXT/
EVENTOUT
I2C2_SDA/ EVENTOUT
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