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M38511EA-SP View Datasheet(PDF) - Renesas Electronics

Part Name
Description
MFG CO.
M38511EA-SP
Renesas
Renesas Electronics 
M38511EA-SP Datasheet PDF : 91 Pages
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3851 Group (Built-in 24 KB or more ROM)
qClear Status Register Command
This command clears the bits (SR4, SR5) which are set when the
status register operation ends in error. When the 5016command
code is sent with the 1st byte, the aforementioned bits are
cleared. When the clear status register operation ends, the SRDY1
(BUSY) signal changes from Hto Llevel.
SCLK1
RxD
TxD
SRDY1(BUSY)
5016
Fig. 68 Timing for clear status register
qPage Program Command
This command writes the specified page (256 bytes) in the flash
memory sequentially one byte at a time. Execute the page pro-
gram command as explained here following.
(1) Transfer the 4116command code with the 1st byte.
(2) Transfer addresses A8 to A15 and A16 to A23 (0016) with the
2nd and 3rd bytes respectively.
(3) From the 4th byte onward, as write data (D0 to D7) for the
page (256 bytes) specified with addresses A8 to A23 is input
sequentially from the smallest address first, that page is auto-
matically written.
When reception setup for the next 256 bytes ends, the SRDY1
(BUSY) signal changes from Hto Llevel. The result of the
page program can be known by reading the status register. For
more information, see the section on the status register.
SCLK1
RxD
TxD
SRDY1(BUSY)
Fig. 69 Timing for page program
4116
A8 to
A15
A16 to
A23
data0
Rev.1.01 Oct 15, 2003 page 66 of 89
data255

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