ST16C1450(2005) View Datasheet(PDF) - Exar Corporation

Part Name

Description

MFG CO.

ST16C1450
(Rev.:2005)

2.97V TO 5.5V UART

Exar Corporation 

xr

REV. 4.2.1

TABLE OF CONTENTS

ST16C1450/51

2.97V TO 5.5VUART

GENERAL DESCRIPTION................................................................................................. 1

FEATURES ..................................................................................................................................................... 1

APPLICATIONS ............................................................................................................................................... 1

FIGURE 1. BLOCK DIAGRAM ............................................................................................................................................................. 1

FIGURE 2. ST16C1450 PINOUTS ..................................................................................................................................................... 2

ORDERING INFORMATION ................................................................................................................................ 2

PIN DESCRIPTIONS ......................................................................................................... 3

DATA BUS INTERFACE ............................................................................................................................................. 3

MODEM OR SERIAL I/O INTERFACE ....................................................................................................................... 3

1.0 PRODUCT DESCRIPTION .................................................................................................................... 4

ANCILLARY SIGNALS ................................................................................................................................................ 4

2.0 FUNCTIONAL DESCRIPTIONS ............................................................................................................ 5

2.1 INTERNAL REGISTERS ................................................................................................................................... 5

2.2 CRYSTAL OSCILLATOR OR EXTERNAL CLOCK ......................................................................................... 5

FIGURE 3. TYPICAL OSCILLATOR CONNECTIONS................................................................................................................................. 5

2.3 PROGRAMMABLE BAUD RATE GENERATOR ............................................................................................. 5

TABLE 1: TYPICAL DATA RATES WITH A 14.7456 MHZ CRYSTAL OR EXTERNAL CLOCK ........................................................................ 6

2.4 TRANSMITTER ................................................................................................................................................. 6

2.4.1 TRANSMIT HOLDING REGISTER (THR) - WRITE ONLY........................................................................................... 6

2.4.2 TRANSMITTER OPERATION....................................................................................................................................... 6

FIGURE 4. TRANSMITTER OPERATION ............................................................................................................................................... 7

2.5 RECEIVER ........................................................................................................................................................ 7

2.5.1 RECEIVE HOLDING REGISTER (RHR) - READ-ONLY .............................................................................................. 7

FIGURE 5. RECEIVER OPERATION IN NON-FIFO MODE...................................................................................................................... 8

2.6 SPECIAL (ENHANCED FEATURE) MODE ..................................................................................................... 8

2.6.1 SOFT RESET ................................................................................................................................................................ 8

2.6.2 POWER DOWN MODE ................................................................................................................................................. 8

2.7 INTERNAL LOOPBACK .................................................................................................................................. 8

FIGURE 6. INTERNAL LOOPBACK....................................................................................................................................................... 9

3.0 UART INTERNAL REGISTERS ........................................................................................................... 10

TABLE 2: ST16C1450 UART INTERNAL REGISTERS................................................................................................................ 10

TABLE 3: INTERNAL REGISTERS DESCRIPTION. SHADED BITS ARE ENABLED WHEN EFR BIT-4=1......................................... 11

4.0 INTERNAL REGISTER DESCRIPTIONS ............................................................................................ 12

4.1 RECEIVE HOLDING REGISTER (RHR) - READ- ONLY ............................................................................... 12

4.2 TRANSMIT HOLDING REGISTER (THR) - WRITE-ONLY ............................................................................ 12

4.3 INTERRUPT ENABLE REGISTER (IER) - READ/WRITE ............................................................................. 12

4.4 INTERRUPT STATUS REGISTER (ISR) - READ-ONLY ............................................................................... 12

4.4.1 INTERRUPT GENERATION: ...................................................................................................................................... 13

4.4.2 INTERRUPT CLEARING: ........................................................................................................................................... 13

TABLE 4: INTERRUPT SOURCE AND PRIORITY LEVEL ....................................................................................................................... 13

4.5 LINE CONTROL REGISTER (LCR) - READ/WRITE ..................................................................................... 13

TABLE 5: PARITY SELECTION .......................................................................................................................................................... 14

4.6 MODEM CONTROL REGISTER (MCR) OR GENERAL PURPOSE OUTPUTS CONTROL - READ/WRITE 15

4.7 LINE STATUS REGISTER (LSR) - READ ONLY ........................................................................................... 16

4.8 MODEM STATUS REGISTER (MSR) - READ ONLY .................................................................................... 16

4.9 SCRATCH PAD REGISTER (SPR) - READ/WRITE ...................................................................................... 17

TABLE 6: UART RESET CONDITIONS ........................................................................................................................................ 18

ABSOLUTE MAXIMUM RATINGS .................................................................................. 19

TYPICAL PACKAGE THERMAL RESISTANCE DATA (MARGIN OF ERROR: ± 15%) ................................................. 19

ELECTRICAL CHARACTERISTICS................................................................................ 19

DC ELECTRICAL CHARACTERISTICS.............................................................................................................. 19

AC ELECTRICAL CHARACTERISTICS.............................................................................................................. 20

TA=0O TO 70OC (-40O TO +85OC FOR INDUSTRIAL GRADE PACKAGE), VCC IS 2.97V TO 5.5V...................... 20

FIGURE 7. CLOCK TIMING............................................................................................................................................................... 21

FIGURE 8. MODEM INPUT/OUTPUT TIMING ...................................................................................................................................... 21

FIGURE 9. DATA BUS READ TIMING................................................................................................................................................ 22

FIGURE 10. DATA BUS WRITE TIMING ............................................................................................................................................ 22

FIGURE 11. RECEIVE READY & INTERRUPT TIMING ......................................................................................................................... 23

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