PSD913G3V-90MI View Datasheet(PDF) - STMicroelectronics
Part Name
Description
MFG CO.
PSD913G3V-90MI Datasheet PDF : 94 Pages
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PSD9XX Family
Preliminary Information
Microcontroller Interface – PSD9XX AC/DC Parameters
(5V ± 10% Versions)
Read Timing (5 V ± 10% Versions)
Symbol
Parameter
-70
-90
-15
Turbo
Conditions Min Max Min Max Min Max Off Unit
t LVLX
t AVLX
t LXAX
t AVQV
t SLQV
ALE or AS Pulse Width
Address Setup Time
Address Hold Time
Address Valid to Data Valid
CS Valid to Data Valid
RD to Data Valid 8-Bit Bus
(Note 3)
(Note 3)
(Note 3)
(Note 5)
15
20
28
ns
4
6
10
ns
7
8
11
ns
70
90
150 Add 10 ns
75
100
150
ns
24
32
40
ns
t RLQV
RD or PSEN to Data Valid 8-Bit Bus,
8031, 80251
(Note 2)
31
38
45
ns
t RHQX RD Data Hold Time
(Note 1)
0
0
0
ns
tRLRH RD Pulse Width
(Note 1) 27
32
38
ns
tRHQZ RD to Data High-Z
(Note 1)
20
25
30
ns
tEHEL E Pulse Width
27
32
38
ns
tTHEH R/W Setup Time to Enable
6
10
18
ns
t ELTL
R/W Hold Time After Enable
0
0
0
ns
tAVPV Address Input Valid to Address
(Note 4)
20
25
30
ns
Output Delay
NOTES: 1.
2.
3.
4.
5.
RD timing has the same timing as DS, LDS, UDS, and PSEN signals.
RD and PSEN have the same timing.
Any input used to select an internal PSD9XX function.
In multiplexed mode, latched addresses generated from ADIO delay to address output on any Port.
RD timing has the same timing as DS, LDS, and UDS signals.
68
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