PSD913G3V-C-90UI View Datasheet(PDF) - STMicroelectronics
Part Name
Description
MFG CO.
PSD913G3V-C-90UI Datasheet PDF : 94 Pages
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Preliminary Information
PSD9XX Family
The
PSD9XX
Functional
Blocks
(cont.)
9.1.3.2 Configuration Modes for MCUs with Separate Program and Data Spaces
9.1.3.2.1 Separate Space Modes
Code memory space is separated from data memory space. For example, the PSEN
signal is used to access the program code from the Flash Memory, while the RD signal is
used to access data from the Boot memory, SRAM and I/O Ports. This configuration
requires the VM register to be set to 0Ch.
9.1.3.2.2 . Combined Space Modes
The program and data memory spaces are combined into one space that allows the main
Flash Memory, Boot memory, and SRAM to be accessed by either PSEN or RD. For
example, to configure the main Flash memory in combined space mode, bits 2 and 4 of the
VM register are set to “1”.
9.1.3.3 80C31 Memory Map Example
See Application Note for examples.
Figure 6. 8031 Memory Modes – Separate Space Mode
DPLD
RS0
CSBOOT0-3
FS0-7
PSEN
RD
MAIN
FLASH
CS
OE
SECONDARY
FLASH
BLOCK
CS
OE
Figure 7. 80C31 Memory Mode – Combined Space Mode
SRAM
CS
OE
RD
VM REG BIT 3
VM REG BIT 4
PSEN
VM REG BIT 1
VM REG BIT 2
VM REG BIT 0
DPLD
RS0
CSBOOT0-3
FS0-7
MAIN
FLASH
CS
OE
SECONDARY
FLASH
BLOCK
CS
OE
SRAM
CS
OE
RD
29
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