LH28F160S5HD-L90 View Datasheet(PDF) - Sharp Electronics

Part Name

Description

MFG CO.

LH28F160S5HD-L90

16 M-bit (2 MB x 8/1 MB x 16) Smart 5 Flash Memories (Fast Programming)

Sharp Electronics 

6.2.7 RESET OPERATIONS

LH28F160S5-L/S5H-L

STS (R)

High Z

VOL

VIH

RP# (P)

VIL

STS (R)

High Z

VOL

RP# (P) VIH

VIL

5V

VCC

VIL

VIH

RP# (P)

VIL

tPLPH

(A) Reset During Read Array Mode

tPLRH

tPLPH

(B) Reset During Block Erase, Full Chip Erase, (Multi) Word/Byte Write

or Block Lock-Bit Configuration

t5VPH

(C) VCC Power Up Timing

Fig. 19 AC Waveform for Reset Operation

Reset AC Specifications (NOTE 1)

SYMBOL

PARAMETER

NOTE

VCC = 5.0±0.5 V

MIN.

MAX.

UNIT

RP# Pulse Low Time (If RP# is tied to VCC,

tPLPH

100

ns

this specification is not applicable)

RP# Low to Reset during Block Erase, Full Chip Erase,

tPLRH

2, 3

(Multi) Word/Byte Write or Block Lock-Bit Configuration

t5VPH VCC 4.5 V to RP# High

4

100

13.1

µs

ns

NOTES :

1. These specifications are valid for all product versions

(packages and speeds).

2. If RP# is asserted while a block erase, full chip erase,

(multi) word/byte write or block lock-bit configuration

operation is not executing, the reset will complete within

3. A reset time, tPHQV, is required from the latter of STS

going High Z or RP# going high until outputs are valid.

4. When the device power-up, holding RP#-low minimum

100 ns is required after VCC has been in predefined

range and also has been in stable there.

100 ns.

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