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ST6210LN6/HWD View Datasheet(PDF) - STMicroelectronics

Part Name
Description
MFG CO.
ST6210LN6/HWD Datasheet PDF : 105 Pages
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ST6208C/ST6209C/ST6210C/ST6220C
8-BIT TIMER (Cont’d)
9.2.4 Functional Description
There are three operating modes, which are se-
lected by the TOUT and DOUT bits (see TSCR
register). These three modes correspond to the
two clocks which can be connected to the 7-bit
prescaler (fINT ÷ 12 or TIMER pin signal), and to
the output mode.
The settings for the different operating modes are
summarized Table 13.
Table 13. Timer operating modes
TOUT DOUT
Timer
Fu nction
0
0
Event Counter
(input)
0
1
Gated input
(input)
1
0
Output “0”
(output)
1
1
Output “1”
(output)
Applica tion
External counter clock
source
External Pulse length
measurement
Output signal
generation
9.2.4.1 Gated mode
(TOUT = “0”, DOUT = “1”)
In this mode, the prescaler is decremented by the
Timer clock input, but only when the signal on the
TIMER pin is held high (fINT/12 gated by TIMER
pin). See Figure 28 and Figure 29.
This mode is selected by clearing the TOUT bit in
the TSCR register (i.e. as input) and setting the
DOUT bit.
Note: In this mode, if the TIMER pin is multi-
plexed, the corresponding port control bits have to
be set in input with pull-up configuration through
the DDR, OR and DR registers. For more details,
please refer to the I/O Ports section.
Figure 28. fTIMER Clock in Gated Mode
fINT/12
TI MER
fEXT
fPRESCALER
Figure 29. Gated Mode Operation
COUNTE R VALUE
xx1 VALUE 1
xx2
VALUE 2
TIMER PIN
1
PULSE LENGTH
TIMER CLOCK
48/105
1

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