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PERICOM
Pericom Semiconductor Corporation
Description : High-Speed DIFFERENTIAL LINE RECEIVERS

Description
The PI90LVx386 family consists of sixteen DIFFERENTIAL LINE RECEIVERS with 3-state outputs that implement Low-Voltage DIFFERENTIAL Signaling (LVDS). Any of the DIFFERENTIAL RECEIVERS will provide a valid logical output state with a ±100mV DIFFERENTIAL input voltage within the input common-mode voltage range that allows 0 to 3V of ground potential difference between two LVDS nodes. The independent EN pins can be used to place the outputs in either a normal logic state (high or low logic levels) or a high-impedance state. In high-impedance state, outputs neither load nor drive the bus LINEs.

Features
• Sixteen LINE RECEIVERS meet or exceed the requirements of the ANSI TIA/EIA-644-1995 Standard
• Designed for signaling rates up to 660 Mbps
• 0V to 3V common-mode input voltage range
• Operates from a single 3.3V supply
• Typical propagation delay time: 2.6ns
• Output skew 100ps (typical)
• Part-to-part skew is less than 1ns
• Integrated 110-Ohm termination on PI90LVT386
• Low Voltage TTL (LVTTL) levels are 5V tolerant
• Open-circuit fail safe
• Flow-through pin out
• Packaging (Pb-free & Green available):
    - 64-Pin Thin Shrink Small Output TSSOP (A)

Description : High-Speed DIFFERENTIAL LINE RECEIVERS

Description
The PI90LVx386 family consists of sixteen DIFFERENTIAL LINE RECEIVERS with 3-state outputs that implement Low-Voltage DIFFERENTIAL Signaling (LVDS). Any of the DIFFERENTIAL RECEIVERS will provide a valid logical output state with a ±100mV DIFFERENTIAL input voltage within the input common-mode voltage range that allows 0 to 3V of ground potential difference between two LVDS nodes. The independent EN pins can be used to place the outputs in either a normal logic state (high or low logic levels) or a high-impedance state. In high-impedance state, outputs neither load nor drive the bus LINEs.

Features
• Sixteen LINE RECEIVERS meet or exceed the requirements of the ANSI TIA/EIA-644-1995 Standard
• Designed for signaling rates up to 660 Mbps
• 0V to 3V common-mode input voltage range
• Operates from a single 3.3V supply
• Typical propagation delay time: 2.6ns
• Output skew 100ps (typical)
• Part-to-part skew is less than 1ns
• Integrated 110-Ohm termination on PI90LVT386
• Low Voltage TTL (LVTTL) levels are 5V tolerant
• Open-circuit fail safe
• Flow-through pin out
• Packaging (Pb-free & Green available):
    - 64-Pin Thin Shrink Small Output TSSOP (A)

Description : 3.3V Boost LVDS High-Speed DIFFERENTIAL LINE Drivers and RECEIVERS

Product Description
The PI90LVB179, PI90LVB180, PI90LVB050, and PI90LVB051 are DIFFERENTIAL LINE drivers and RECEIVERS (transceivers) that are similar to the IEEE 1596.3 SCI and ANSI/TIA/EIA-644 LVDS standards (the difference is that the driver output current is doubled). This modification enables true half-duplex operation with more than one LVDS driver or with two LINE transmission resistors over a 50 ohm DIFFERENTIAL transmission LINE. These devices use low-voltage DIFFERENTIAL signaling (LVDS) to achieve data rates in excess of 660 Mbps while being less susceptible to noise than single-ended transmission.

Product Features
• Signaling Rates >660 Mbps (330 MHz)
• Single 3.3V Power Supply Design
• Driver:
    — ±350mV DIFFERENTIAL Swing into a 50 ohm load
    — Propogation Delay of 1.5ns Typ.
    — Low Voltage TTL (LVTTL) Inputs are 5V Tolerant
    — Driver is High Impedance when Disabled or VCC < 1.5V
• Receiver:
    — Accepts ±50mV (min.) DIFFERENTIAL Swing with up to 2.0V ground potential difference
    — Propagation Delay of 3.3ns Typ.
    — Low Voltage TTL (LVTTL) Outputs
    — Open, Short, and Terminated Fail Safe
• Industrial Temperature Operating Range: –40°C to 85°C
• Package Options: SOIC, TSSOP, MSOP
• Bus-Terminal ESD ≥ 12kV

MaximIC
Maxim Integrated
Description : Ultra-High-Speed, Low-Distortion, DIFFERENTIAL to-Single-Ended LINE RECEIVERS with Enable

General Description
The MAX4444/MAX4445 DIFFERENTIAL LINE RECEIVERS offer unparalleled high-speed, low-distortion performance. Using a three op amp instrumentation amplifier architecture, these ICs have symmetrical DIFFERENTIAL inputs and a single-ended output. They operate from ±5V supplies and are capable of driving a 100Ω load to ±3.7V. The MAX4444 has an internally set closed-loop gain of +2V/V, while the MAX4445 is compensated for gains of +2V/V or greater, set by an external resistor. A low-power enable mode reduces current consumption to 3.5mA.

Features
♦ 5000V/µs Slew Rate (MAX4444)
♦ +2V/V Internally Fixed Gain (MAX4444)
♦ External Gain Selection (MAX4445, AVCL ≥ +2V/V)
♦ 550MHz -3dB Bandwidth
♦ -60dB SFDR at 5MHz
♦ Low DIFFERENTIAL Gain/Phase: 0.07%/0.05°
♦ Low Noise: 25nV/√Hz at fIN = 100kHz
♦ Low-Power Disable Mode Reduces Quiescent Current to 3.5mA

Description : 3V LVDS High-Speed DIFFERENTIAL LINE RECEIVERS

Description
The PI90LV032A, PI90LV028A, and PI90LV018A are DIFFERENTIAL LINE RECEIVERS that use low-voltage DIFFERENTIAL signaling (LVDS) to support data rates in excess of 400 Mbps. These products are designed for applications requiring high-speed, low-power consumption and low noise generation.

Features
• Signaling Rates >400Mbps (200 MHz)
• Single 3.3V Power Supply Design
• Accepts ±350mV (typical) DIFFERENTIAL Swing
• Maximum DIFFERENTIAL Skew of 0.35ns
• Maximum Propagation Delay of 3.3ns
• Low Voltage TTL (LVTTL) Outputs
• Industrial Temperature Operating Range: -40°C to 85°C
• Open, Short, and Terminated Fail Safe
• Meets or Exceeds IEEE 1596.3 SCI Standard
• Meets or Exceeds ANSI/TIA/EIA-644 LVDS Standard
• Packaging (Pb-free & Green avaliable): - SOIC, TSSOP, and MSOP

Applications
    Applications include point-to-point and multidrop baseband data transmission over controlled impedance media of approximately 100 Ohms. The transmission media can be printed circuit board traces, backplanes, or cables.

Part Name(s) : 74LS241 HD74LS241
Hitachi
Hitachi -> Renesas Electronics
Description : Octal Buffers/LINE Drivers/LINE RECEIVERS

Octal Buffers/LINE Drivers/LINE RECEIVERS (non inverted three-state outputs)

Part Name(s) : STLVDS32 STLVDS32BD
ST-Microelectronics
STMicroelectronics
Description : HIGH SPEED DIFFERENTIAL LINE RECEIVERS

DESCRIPTION
The STLVDS32 is a DIFFERENTIAL LINE receiver that implements the electrical characteristics of low voltage DIFFERENTIAL signaling (LVDS). This signaling technique lowers the output voltage levels of 5V DIFFERENTIAL standard levels (such as TIA/EIA-422B) to reduce the power, increase the switching speeds and allow operations with a 3.3V supply rail. This DIFFERENTIAL receiver provides a valid logical output state with a 3.3V supply rail. It also provides a valid logical output state with a ±100mV DIFFERENTIAL input voltage within the input common mode voltage range. The input common mode voltage allows 1V of ground potential difference between two LVDS nodes.
The intended application of this device and signalling technique is both point-to-point and multidrop data transmission over controlled impedance media approximately 100Ω. The transmission media may be printed circuit board traces, backplanes or cables. The ultimate rate and distance of data transfer depend upon the attenuation characteristics of the media and noise coupling to the environment.
The STLVDS32 version is characterized for operation from -40°C to 85°C.

■ MEETS OR EXCEEDS THE
   REQUIREMENTS OF ANSI TIA/EIA-644
   STANDARD
■ OPERATES WITH A SINGLE 3.3V SUPPLY
■ DESIGNED FOR SIGNALING RATE UP TO
   400Mbps
DIFFERENTIAL INPUT THRESHOLDS
   ±100mV MAX
■ TYPICAL PROPAGATION DELAY TIME OF
   2.5ns
■ POWER DISSIPATION 60mW TYPICAL PER
   RECEIVER AT 200MHz
■ LOW VOLATGE TTL (LVTTL) LOGIC
   OUTPUT LEVELS
■ PIN COMPATIBLE WITH THE AM26LS32,
   SN65LVD32
■ OPEN CIRCUIT FAIL SAFE
■ ESD PROTECTION:
   7KV RECEIVER PINS
   3KV ALL PINS VS GND

Renesas
Renesas Electronics
Description : Octal Buffers / LINE Drivers / LINE RECEIVERS (non inverted three-state outputs)

Octal Buffers / LINE Drivers / LINE RECEIVERS (non inverted three-state outputs)

Description : 3.3V LVDS High-Speed DIFFERENTIAL LINE Drivers and RECEIVERS

Product Description
The PI90LV179, PI90LV180, PI90LV050, and PI90LV051 are DIFFERENTIAL LINE drivers and RECEIVERS (transceivers) that are compliant with the IEEE 1596.3 SCI and ANSI/TIA/EIA-644 LVDS standards. These devices use low-voltage DIFFERENTIAL signaling (LVDS) to achieve data rates in excess of 660 Mbps while being less susceptible to noise than single-ended transmission.
The drivers translate a low-voltage TTL/CMOS input into a low voltage (350mV typical) DIFFERENTIAL output signal. The RECEIVERS translate a DIFFERENTIAL 350mV input signal to a 3V CMOS output level. The driver section can be independently set to a power-down and high-impedance output mode with the DEN pin (active HIGH). The receiver section is controlled by the REN* pin (active LOW).

Product Features
• Signaling Rates >660 Mbps (330 MHz)
• Single 3.3V Power Supply Design
• Driver:
   — ±350mV DIFFERENTIAL Swing into a 100-Ohm load
   — Propogation Delay of 1.5ns Typ.
   — Low Voltage TTL (LVTTL) Inputs are 5V Tolerant
   — Driver is High Impedance when Disabled or VCC <1.5V
• Receiver:
   — Accepts ±50mV (min.) DIFFERENTIAL Swing with up to 2.0V
      ground potential difference
   — Propagation Delay of 3.3ns Typ.
   — Low Voltage TTL (LVTTL) Outputs
   — Open, Short, and Terminated Fail Safe
• Industrial Temperature Operating Range: –40°C to 85°C
• Package Options: SOIC, TSSOP, MSOP
• Meets or Exceeds IEEE 1596.3 SCI Standard
• Meets or Exceeds ANSI/TIA/EIA-644 LVDS Standard
• Bus-Terminal ESD exceeds 12kV

Applications
   Applications include point-to-point and multidrop baseband data transmission over a controlled impedance media of approximately 100 ohms. These include intra-system connections via printed circuit board traces or cables, hubs and routers for data communications; PBXs, switches, repeaters and base stations for telecommunications and other applications such as digital cameras, printers and copiers.

Description : 3.3V LVDS High-Speed DIFFERENTIAL LINE Drivers and RECEIVERS

Product Description
The PI90LV179, PI90LV180, PI90LV050, and PI90LV051 are DIFFERENTIAL LINE drivers and RECEIVERS (transceivers) that are compliant with the IEEE 1596.3 SCI and ANSI/TIA/EIA-644 LVDS standards. These devices use low-voltage DIFFERENTIAL signaling (LVDS) to achieve data rates in excess of 660 Mbps while being less susceptible to noise than single-ended transmission.
The drivers translate a low-voltage TTL/CMOS input into a low voltage (350mV typical) DIFFERENTIAL output signal. The RECEIVERS translate a DIFFERENTIAL 350mV input signal to a 3V CMOS output level. The driver section can be independently set to a power-down and high-impedance output mode with the DEN pin (active HIGH). The receiver section is controlled by the REN* pin (active LOW).

Product Features
• Signaling Rates >660 Mbps (330 MHz)
• Single 3.3V Power Supply Design
• Driver:
   — ±350mV DIFFERENTIAL Swing into a 100-Ohm load
   — Propogation Delay of 1.5ns Typ.
   — Low Voltage TTL (LVTTL) Inputs are 5V Tolerant
   — Driver is High Impedance when Disabled or VCC <1.5V
• Receiver:
   — Accepts ±50mV (min.) DIFFERENTIAL Swing with up to 2.0V
      ground potential difference
   — Propagation Delay of 3.3ns Typ.
   — Low Voltage TTL (LVTTL) Outputs
   — Open, Short, and Terminated Fail Safe
• Industrial Temperature Operating Range: –40°C to 85°C
• Package Options: SOIC, TSSOP, MSOP
• Meets or Exceeds IEEE 1596.3 SCI Standard
• Meets or Exceeds ANSI/TIA/EIA-644 LVDS Standard
• Bus-Terminal ESD exceeds 12kV

Applications
   Applications include point-to-point and multidrop baseband data transmission over a controlled impedance media of approximately 100 ohms. These include intra-system connections via printed circuit board traces or cables, hubs and routers for data communications; PBXs, switches, repeaters and base stations for telecommunications and other applications such as digital cameras, printers and copiers.

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