• H.264/MPEG-4 part 10 decoder
• VC-1 Advanced, Simple, Main decoder
• MPEG-2 decoder
• Programmable audio decoder
• Transport demultiplexer
• Still Image Decoder (SID)
• HD-compatible digital video output port
• Multi-host control/status interface
• DDR SDRAM controller
The MAS 35x9F is a single-chip, low-power MPEG layer 2/3 and MPEG2-AAC audio stereo decoder. It also contains the G.729 Annex A speech compression and decompression technology for use in memory based or broadcast applications. Additional functional ity is achievable via download software (e.g., CELP voice decoder, Micronas SC4 (ADPCM) encoder/decoder).
TC4028B is a BCD-to-DECIMAL decoder which converts BCD signal into DECIMAL signal. Of ten outputs from Q0 to Q9, one output corresponding to input BCD code goes to the “H” level and all the others remain at the “L” level. When D is used as inhibit input by use of three input lines from A to C, this decoder can be served as a BINARY-to-OCTAL decoder.
The 100370 universal demultiplexer/decoder functions as either a dual 1-of-4 decoder or as a single 1-of-8 decoder, depending on the signal applied to the Mode Control (M) input.
■35% power reduction of the 100170
■2000V ESD protection
■Pin/function compatible with 100170
■Voltage compensated operating range = −4.2V to −5.7V
35% power reduction of the 100170
2000V ESD protection
Pin/function compatible with 100170
Voltage compensated operating range=−4.2V to −5.7V
The MC54/74F138 is a high speed 1-of-8 Decoder/Demultiplexer. This device is ideally suited for high speed bipolar memory chip select address decoding. The multiple input enables allow parallel expansion to a 1-of-24 decoder using just three F138 devices or to a 1-of-32 decoder using four F138s and one inverter.
• Demultiplexing Capability
• Multiple Input Enable for Easy Expansion
• Active Low Mutually Exclusive Outputs
• Input Clamp Diodes Limit High-Speed Termination Effects
The F138 is a high-speed 1-of-8 decoder/demultiplexer. This device is ideally suited for high-speed bipolar memory chip select address decoding. The multiple input enables allow parallel expansion to a 1-of-24 decoder using just three F138 devices or a 1-of-32 decoder using four F138 devices and one inverter.
Multiple input enable for easy expansion
Active LOW mutually exclusive outputs
A highly integrated SOC for MP3 player, AU6850B int egrates MCU, MP3 decoder, USB Host controller, SD/MMC card controller, a 16-bit audio decoder and an IR decoder in a single chi p. Compared with traditi onal f lash-MP3 player, AU6850B offers a lower cost, lower power consumption, f lexibl e and more powerf ul host MP3 player soluti on.
The UM3750 Encoder / Decoder is a CMOS / LSI digital code Transmitter-Receiver system.
A highly integrated SOC for MP3 player, AU6850 int egrates MCU, MP3 decoder, USB Host controller, SD/MMC card controller, a 16-bit audio decoder and an IR decoder in a single chip.
Besides AU6850 embedded a 32KB OTP memory, which provide an ultra low cost, low power consumption, f lexible and more powerf ul Host MP3 player solution compared with ot her traditi onal f lash-MP3 player.