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TUSB9261IPAPRQ1 Datasheet PDF - Texas Instruments

Part NameDescriptionManufacturer
TUSB9261IPAPRQ1 USB 3.0 TO SATA BRIDGE TI
Texas Instruments TI
Other PDF  no available.
TUSB9261IPAPRQ1 Datasheet PDF : TUSB9261IPAPRQ1 pdf   
TUSB9261-Q1 image

DESCRIPTION
The TUSB9261-Q1 is an ARM cortex M3 microcontroller based Universal Serial Bus (USB) 3.0 to Serial ATA (SATA) bridge. It provides the necessary hardware and firmware to implement a USB Attached SCSI Protocol (UASP) compliant mass storage device suitable for bridging SATA compatible hard disk drives (HDD) and solid state disk drives (SSD) to a USB 3.0 bus. The firmware also implements the mass storage class bulk-only transport (BOT) for bridging optical drives and other compatible SATA devices to the USB bus. In addition to UASP and BOT support,a USB human interface device (HID) interfaces is supported for control of the general purpose input/ouput (GPIO). The SATA interface supports gen1 (1.5-Gbps) and gen2 (3.0-Gbps) for cable lengths up to 2 meters.
The device is available in a 64-pin HTQFP package and is designed for operation over the industrial temperature range of -40°C to 85°C.

FEATURES
• Qualified for Automotive Applications
• AEC-Q100 Qualified with the Following
   Exceptions:
   – Device CDM ESD Classification Level C3
• Ideal for bridging Serial ATA (SATA) Devices,
   Such as Hard Disk Drives (HDD), Solid State
   Drives (SSD), or Optical Drives (OD) to
   Universal Serial Bus (USB)
• USB Interface
   – Integrated Transceiver Supports SS/HS/FS
      Signaling
   – Best in Class Adaptive Equalizer
   – Allows for Greater Jitter Tolerance in the
      Receiver
   – USB Class Support
   – USB Attached SCSI Protocol (UASP) for
      HDD and SSD
   – USB Mass Storage Class Bulk-Only
      Transport (BOT) Including Support for
      Error Conditions Per the 13 Cases
      (Defined in the BOT Specification)
   – USB Bootability Support
   – USB Human Interface Device (HID)
   – Supports Firmware Update Via USB Using a
      TI Provided Application
• SATA Interface
   – Serial ATA Specification Revision 2.6
      Supporting gen1 and gen2 Data Rates
   – Supports hot plug
   – Supports Mass-Storage Devices
      Compatible with the ATA/ATAPI-8
      Specification
• Integrated ARM Cortex M3 Core
   – Customizable Application Code Loaded
      From EEPROM Via SPI Interface
   – Two Additional SPI Port Chip Selects for
      Peripheral Connection
   – Up to 5 GPIOs for End-User Configuration
      via HID
   – Serial Communications Interface for Debug
      (UART)
• General Features
   – Integrated Spread Spectrum Clock
      Generation Enables Operation from a
      Single Low Cost Crystal or Clock Oscillator
   – Supports 20, 25, 30 or 40 MHz
   – JTAG Interface for IEEE1149.1 and
      IEEE1149.6 Boundary Scan
   – Available in a Fully RoHS Compliant
      Package (PAP)

APPLICATIONS
• Automotive
• External HDD/SSD
• External DVD
• HDD-Based Portable Media Player

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