The MT4C4001J is a randomly accessed solid-state memory containing 4,194,304 bits organized in a x4 configuration. During READ or WRITE cycles each bit is uniquely addressed through the 20 address bits which are entered 10 bits (A0-A9) at a time. RAS is used to latch the first 10 bits and CAS the later 10 bits. A READ or WRITE cycle is selected with the WE input. A logic HIGH on WEdictates READ mode while a logic LOW on WE dictates WRITE mode. During a WRITE cycle,
A small surface-mount type crystal unit, especially suited for small-sizing requirements.
Ultra compact and thin. (3.2 x 2.5 x 0.75 mm typ.)
Excellent environmental characteristics, including heat and shock resistance.
Excellent electrical performance for OA (office automation) and AV (audiovisual) applications.
Meets the requirements for re-flow profiling using lead-free solder.