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TI
Texas Instruments
SN74LS30NE4 8-INPUT POSITIVE-NAND GATES

8-INPUT POSITIVE-NAND GATES


other parts : 5962-9679201Q2A  5962-9679201QCA  5962-9679201QDA  JM38510/30009B2A  JM38510/30009BCA  JM38510/30009BDA  JM38510/30009SCA  JM38510/30009SDA  SN5430  SN5430J  
SN74LS30NE4 PDF
Fairchild
Fairchild Semiconductor
DM74ALS30AN 8-Input NAND Gate

General Description
This device contains a single gate, which performs the logic NAND function.

Features
■ Switching specifications at 50 pF
■ Switching specifications guaranteed over full temperature and VCC range
■ Advanced oxide-isolated, ion-implanted Schottky TTL process
■ Functionally and pin for pin compatible with Schottky
   and low power Schottky TTL counterpart
■ Improved AC performance over Schottky and low power
   Schottky counterparts


other parts : DM74ALS30AM  DM74ALS30AMX  DM74ALS30ASJ  DM74ALS30ASJX  DM74ALS30A  
DM74ALS30AN PDF
TI
Texas Instruments
SMJ320E6203GLS300 FIXED-POINT DIGITAL SIGNAL PROCESSORS

description
The TMS320C6202, TMS320C6202B, TMS320C6203, and TMS320C6204 devices are part of the TMS320C62x fixed-point DSP family in the TMS320C6000 platform. The ’C62x devices are based on the high-performance, advanced VelociTI very-long-instruction-word (VLIW) architecture developed by Texas Instruments (TI), making these DSPs an excellent choice for multichannel and multifunction applications.

Highest Performance Fixed-Point Digital Signal Processors (DSPs) TMS320C62x
– 5-, 4-, 3.33-ns Instruction Cycle Time
– 200-, 250-, 300-MHz Clock Rate
– Eight 32-Bit Instructions/Cycle
– 1600, 2000, 2400 MIPS
VelociTI™ Advanced Very Long Instruction
Word (VLIW) ’C62x CPU Core
– Eight Highly Independent Functional Units:
  – Six ALUs (32-/40-Bit)
  – Two 16-Bit Multipliers (32-Bit Result)
– Load-Store Architecture With 32 32-Bit General-Purpose Registers
– Instruction Packing Reduces Code Size
– All Instructions Conditional
Instruction Set Features
– Byte-Addressable (8-, 16-, 32-Bit Data)
– 8-Bit Overflow Protection
– Saturation
– Bit-Field Extract, Set, Clear
– Bit-Counting
– Normalization
On-Chip SRAM
– 1M-Bit (’C6204)
– 3M-Bit (’C6202/’C6202B)
– 7M-Bit (’C6203)
32-Bit External Memory Interface (EMIF)
– Glueless Interface to Synchronous Memories: SDRAM or SBSRAM
– Glueless Interface to Asynchronous Memories: SRAM and EPROM
– 52M-Byte Addressable External Memory Space
Four-Channel Bootloading Direct-Memory-Access (DMA) Controller With an Auxiliary Channel


other parts : SM320C6202BFD100  SM320C6202BFD120  SM320C6202BFD150  SM320C6202BFD167  SM320C6202BFD200  SM320C6202BFD233  SM320C6202BFD250  SM320C6202BFD300  SM320C6202BFDA100  SM320C6202BFDA120  
SMJ320E6203GLS300 PDF
TI
Texas Instruments
TMX320C6203GLS300 FIXED-POINT DIGITAL SIGNAL PROCESSORS

description
The TMS320C6202, TMS320C6202B, TMS320C6203, and TMS320C6204 devices are part of the TMS320C62x fixed-point DSP family in the TMS320C6000 platform. The ’C62x devices are based on the high-performance, advanced VelociTI very-long-instruction-word (VLIW) architecture developed by Texas Instruments (TI), making these DSPs an excellent choice for multichannel and multifunction applications.

Highest Performance Fixed-Point Digital Signal Processors (DSPs) TMS320C62x
– 5-, 4-, 3.33-ns Instruction Cycle Time
– 200-, 250-, 300-MHz Clock Rate
– Eight 32-Bit Instructions/Cycle
– 1600, 2000, 2400 MIPS
VelociTI™ Advanced Very Long Instruction
Word (VLIW) ’C62x CPU Core
– Eight Highly Independent Functional Units:
  – Six ALUs (32-/40-Bit)
  – Two 16-Bit Multipliers (32-Bit Result)
– Load-Store Architecture With 32 32-Bit General-Purpose Registers
– Instruction Packing Reduces Code Size
– All Instructions Conditional
Instruction Set Features
– Byte-Addressable (8-, 16-, 32-Bit Data)
– 8-Bit Overflow Protection
– Saturation
– Bit-Field Extract, Set, Clear
– Bit-Counting
– Normalization
On-Chip SRAM
– 1M-Bit (’C6204)
– 3M-Bit (’C6202/’C6202B)
– 7M-Bit (’C6203)
32-Bit External Memory Interface (EMIF)
– Glueless Interface to Synchronous Memories: SDRAM or SBSRAM
– Glueless Interface to Asynchronous Memories: SRAM and EPROM
– 52M-Byte Addressable External Memory Space
Four-Channel Bootloading Direct-Memory-Access (DMA) Controller With an Auxiliary Channel


other parts : SM320C6202BFD100  SM320C6202BFD120  SM320C6202BFD150  SM320C6202BFD167  SM320C6202BFD200  SM320C6202BFD233  SM320C6202BFD250  SM320C6202BFD300  SM320C6202BFDA100  SM320C6202BFDA120  
TMX320C6203GLS300 PDF
TI
Texas Instruments
TMX320E6204GLS300 FIXED-POINT DIGITAL SIGNAL PROCESSORS

description
The TMS320C6202, TMS320C6202B, TMS320C6203, and TMS320C6204 devices are part of the TMS320C62x fixed-point DSP family in the TMS320C6000 platform. The ’C62x devices are based on the high-performance, advanced VelociTI very-long-instruction-word (VLIW) architecture developed by Texas Instruments (TI), making these DSPs an excellent choice for multichannel and multifunction applications.

Highest Performance Fixed-Point Digital Signal Processors (DSPs) TMS320C62x
– 5-, 4-, 3.33-ns Instruction Cycle Time
– 200-, 250-, 300-MHz Clock Rate
– Eight 32-Bit Instructions/Cycle
– 1600, 2000, 2400 MIPS
VelociTI™ Advanced Very Long Instruction
Word (VLIW) ’C62x CPU Core
– Eight Highly Independent Functional Units:
  – Six ALUs (32-/40-Bit)
  – Two 16-Bit Multipliers (32-Bit Result)
– Load-Store Architecture With 32 32-Bit General-Purpose Registers
– Instruction Packing Reduces Code Size
– All Instructions Conditional
Instruction Set Features
– Byte-Addressable (8-, 16-, 32-Bit Data)
– 8-Bit Overflow Protection
– Saturation
– Bit-Field Extract, Set, Clear
– Bit-Counting
– Normalization
On-Chip SRAM
– 1M-Bit (’C6204)
– 3M-Bit (’C6202/’C6202B)
– 7M-Bit (’C6203)
32-Bit External Memory Interface (EMIF)
– Glueless Interface to Synchronous Memories: SDRAM or SBSRAM
– Glueless Interface to Asynchronous Memories: SRAM and EPROM
– 52M-Byte Addressable External Memory Space
Four-Channel Bootloading Direct-Memory-Access (DMA) Controller With an Auxiliary Channel


other parts : SM320C6202BFD100  SM320C6202BFD120  SM320C6202BFD150  SM320C6202BFD167  SM320C6202BFD200  SM320C6202BFD233  SM320C6202BFD250  SM320C6202BFD300  SM320C6202BFDA100  SM320C6202BFDA120  
TMX320E6204GLS300 PDF
TI
Texas Instruments
SN74ALS30AN3 8-INPUT POSITIVE-NAND GATES

SINGLE 8-INPUT POSITIVE-NAND GATE

SN5430, SN54LS30, SN54S30, SN7430, SN74LS30, SN74S30


other parts : 5430J  54ALS30AJ  54AS30J  54F30J  54LS30J  54S30J  74ALS30AD  74ALS30ADR  74ALS30AN  74ALS30AN3  
SN74ALS30AN3 PDF
TI
Texas Instruments
SMJ320F6204GLS300 FIXED-POINT DIGITAL SIGNAL PROCESSORS

description
The TMS320C6202, TMS320C6202B, TMS320C6203, and TMS320C6204 devices are part of the TMS320C62x fixed-point DSP family in the TMS320C6000 platform. The ’C62x devices are based on the high-performance, advanced VelociTI very-long-instruction-word (VLIW) architecture developed by Texas Instruments (TI), making these DSPs an excellent choice for multichannel and multifunction applications.

Highest Performance Fixed-Point Digital Signal Processors (DSPs) TMS320C62x
– 5-, 4-, 3.33-ns Instruction Cycle Time
– 200-, 250-, 300-MHz Clock Rate
– Eight 32-Bit Instructions/Cycle
– 1600, 2000, 2400 MIPS
VelociTI™ Advanced Very Long Instruction
Word (VLIW) ’C62x CPU Core
– Eight Highly Independent Functional Units:
  – Six ALUs (32-/40-Bit)
  – Two 16-Bit Multipliers (32-Bit Result)
– Load-Store Architecture With 32 32-Bit General-Purpose Registers
– Instruction Packing Reduces Code Size
– All Instructions Conditional
Instruction Set Features
– Byte-Addressable (8-, 16-, 32-Bit Data)
– 8-Bit Overflow Protection
– Saturation
– Bit-Field Extract, Set, Clear
– Bit-Counting
– Normalization
On-Chip SRAM
– 1M-Bit (’C6204)
– 3M-Bit (’C6202/’C6202B)
– 7M-Bit (’C6203)
32-Bit External Memory Interface (EMIF)
– Glueless Interface to Synchronous Memories: SDRAM or SBSRAM
– Glueless Interface to Asynchronous Memories: SRAM and EPROM
– 52M-Byte Addressable External Memory Space
Four-Channel Bootloading Direct-Memory-Access (DMA) Controller With an Auxiliary Channel


other parts : SM320C6202BFD100  SM320C6202BFD120  SM320C6202BFD150  SM320C6202BFD167  SM320C6202BFD200  SM320C6202BFD233  SM320C6202BFD250  SM320C6202BFD300  SM320C6202BFDA100  SM320C6202BFDA120  
SMJ320F6204GLS300 PDF
TI
Texas Instruments
SN74LS30J 8-INPUT POSITIVE-NAND GATES

8-INPUT POSITIVE-NAND GATES


other parts : 5962-9679201Q2A  5962-9679201QCA  5962-9679201QDA  JM38510/30009B2A  JM38510/30009BCA  JM38510/30009BDA  JM38510/30009SCA  JM38510/30009SDA  SN5430  SN5430J  
SN74LS30J PDF
Fairchild
Fairchild Semiconductor
DM74ALS30A 8-Input NAND Gate

General Description
This device contains a single gate, which performs the logic NAND function.

Features
■ Switching specifications at 50 pF
■ Switching specifications guaranteed over full temperature and VCC range
■ Advanced oxide-isolated, ion-implanted Schottky TTL process
■ Functionally and pin for pin compatible with Schottky
   and low power Schottky TTL counterpart
■ Improved AC performance over Schottky and low power
   Schottky counterparts


other parts : DM74ALS30AM  DM74ALS30AMX  DM74ALS30AN  DM74ALS30ASJ  DM74ALS30ASJX  
DM74ALS30A PDF
Fairchild
Fairchild Semiconductor
DM74ALS30ASJ 8-Input NAND Gate

General Description
This device contains a single gate, which performs the logic NAND function.

Features
■ Switching specifications at 50 pF
■ Switching specifications guaranteed over full temperature and VCC range
■ Advanced oxide-isolated, ion-implanted Schottky TTL process
■ Functionally and pin for pin compatible with Schottky
   and low power Schottky TTL counterpart
■ Improved AC performance over Schottky and low power
   Schottky counterparts


other parts : DM74ALS30AM  DM74ALS30AMX  DM74ALS30AN  DM74ALS30ASJX  DM74ALS30A  
DM74ALS30ASJ PDF
TI
Texas Instruments
TMP320E6202BGLS300 FIXED-POINT DIGITAL SIGNAL PROCESSORS

description
The TMS320C6202, TMS320C6202B, TMS320C6203, and TMS320C6204 devices are part of the TMS320C62x fixed-point DSP family in the TMS320C6000 platform. The ’C62x devices are based on the high-performance, advanced VelociTI very-long-instruction-word (VLIW) architecture developed by Texas Instruments (TI), making these DSPs an excellent choice for multichannel and multifunction applications.

Highest Performance Fixed-Point Digital Signal Processors (DSPs) TMS320C62x
– 5-, 4-, 3.33-ns Instruction Cycle Time
– 200-, 250-, 300-MHz Clock Rate
– Eight 32-Bit Instructions/Cycle
– 1600, 2000, 2400 MIPS
VelociTI™ Advanced Very Long Instruction
Word (VLIW) ’C62x CPU Core
– Eight Highly Independent Functional Units:
  – Six ALUs (32-/40-Bit)
  – Two 16-Bit Multipliers (32-Bit Result)
– Load-Store Architecture With 32 32-Bit General-Purpose Registers
– Instruction Packing Reduces Code Size
– All Instructions Conditional
Instruction Set Features
– Byte-Addressable (8-, 16-, 32-Bit Data)
– 8-Bit Overflow Protection
– Saturation
– Bit-Field Extract, Set, Clear
– Bit-Counting
– Normalization
On-Chip SRAM
– 1M-Bit (’C6204)
– 3M-Bit (’C6202/’C6202B)
– 7M-Bit (’C6203)
32-Bit External Memory Interface (EMIF)
– Glueless Interface to Synchronous Memories: SDRAM or SBSRAM
– Glueless Interface to Asynchronous Memories: SRAM and EPROM
– 52M-Byte Addressable External Memory Space
Four-Channel Bootloading Direct-Memory-Access (DMA) Controller With an Auxiliary Channel


other parts : SM320C6202BFD100  SM320C6202BFD120  SM320C6202BFD150  SM320C6202BFD167  SM320C6202BFD200  SM320C6202BFD233  SM320C6202BFD250  SM320C6202BFD300  SM320C6202BFDA100  SM320C6202BFDA120  
TMP320E6202BGLS300 PDF
TI
Texas Instruments
TMP320F6202GLS300 FIXED-POINT DIGITAL SIGNAL PROCESSORS

description
The TMS320C6202, TMS320C6202B, TMS320C6203, and TMS320C6204 devices are part of the TMS320C62x fixed-point DSP family in the TMS320C6000 platform. The ’C62x devices are based on the high-performance, advanced VelociTI very-long-instruction-word (VLIW) architecture developed by Texas Instruments (TI), making these DSPs an excellent choice for multichannel and multifunction applications.

Highest Performance Fixed-Point Digital Signal Processors (DSPs) TMS320C62x
– 5-, 4-, 3.33-ns Instruction Cycle Time
– 200-, 250-, 300-MHz Clock Rate
– Eight 32-Bit Instructions/Cycle
– 1600, 2000, 2400 MIPS
VelociTI™ Advanced Very Long Instruction
Word (VLIW) ’C62x CPU Core
– Eight Highly Independent Functional Units:
  – Six ALUs (32-/40-Bit)
  – Two 16-Bit Multipliers (32-Bit Result)
– Load-Store Architecture With 32 32-Bit General-Purpose Registers
– Instruction Packing Reduces Code Size
– All Instructions Conditional
Instruction Set Features
– Byte-Addressable (8-, 16-, 32-Bit Data)
– 8-Bit Overflow Protection
– Saturation
– Bit-Field Extract, Set, Clear
– Bit-Counting
– Normalization
On-Chip SRAM
– 1M-Bit (’C6204)
– 3M-Bit (’C6202/’C6202B)
– 7M-Bit (’C6203)
32-Bit External Memory Interface (EMIF)
– Glueless Interface to Synchronous Memories: SDRAM or SBSRAM
– Glueless Interface to Asynchronous Memories: SRAM and EPROM
– 52M-Byte Addressable External Memory Space
Four-Channel Bootloading Direct-Memory-Access (DMA) Controller With an Auxiliary Channel


other parts : SM320C6202BFD100  SM320C6202BFD120  SM320C6202BFD150  SM320C6202BFD167  SM320C6202BFD200  SM320C6202BFD233  SM320C6202BFD250  SM320C6202BFD300  SM320C6202BFDA100  SM320C6202BFDA120  
TMP320F6202GLS300 PDF

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