description
The TLC7524C, TLC7524E, and TLC7524I are CMOS, 8-bit, digital-to-analog converters (DACs) designed for easy interface to most popular microprocessors.
The devices are 8-bit, multiplying DACs with input latches and load cycles similar to the write cycles of a random access memory. Segmenting the high-order bits minimizes glitches during changes in the most significant bits, which produce the highest glitch impulse. The devices provide accuracy to 1/2LSB without the
High-Speed CMOS Logic 4- to 16-Line Decoder/Demultiplexer with Input Latches
Description
The CD54HC4514, CD74HC4514, and CD74HC4515 are high-speed silicon gate devices consisting of a 4-bit strobed latch and a 4- to 16-line decoder. The selected output is enabled by a low on the enable input (E). A high onE inhibits selection of any output. Demultiplexing is accomplished by using theE input as the data input and the select inputs (A0-A3) as addresses. ThisE input also serves as a chip select when these devices are cascaded.
High Speed CMOS Logic 4-to-16 Line Decoder/Demultiplexer
Description
The ’HC154 and ’HCT154 are 4- to 16-line decoders/demultiplexers with two enable inputs, E1 and E2. A High on either enable input forces the output into the High state. The demultiplexing function is performed by using the four input lines, A0 to A3, to select the output lines Y0 to Y15, and using one enable as the data input while holding the other enable low.
4-Line to 16-Line Decoder/Demultiplexer with Input Latches
description
The CD74HCT4514 and CD74HCT4515 are high-speed silicon-gate devices consisting of a 4-bit strobed latch and a 4-line to 16-line decoder. The selected output is enabled by a low on the enable (E) input. A high on E inhibits selection of any output. Demultiplexing is accomplished by using E as the data input and the select inputs (A0−A3) as addresses. E also serves as a chip select when these devices are cascaded. When the latch enable (LE) is high, the output follows
High-Speed CMOS Logic 4- to 16-Line Decoder/Demultiplexer with Input Latches
Description
The CD54HC4514, CD74HC4514, and CD74HC4515 are high-speed silicon gate devices consisting of a 4-bit strobed latch and a 4- to 16-line decoder. The selected output is enabled by a low on the enable input (E). A high onE inhibits selection of any output. Demultiplexing is accomplished by using theE input as the data input and the select inputs (A0-A3) as addresses. ThisE input also serves as a chip select when these devices are cascaded.
High Speed CMOS Logic 4-to-16 Line Decoder/Demultiplexer
Description
The ’HC154 and ’HCT154 are 4- to 16-line decoders/demultiplexers with two enable inputs, E1 and E2. A High on either enable input forces the output into the High state. The demultiplexing function is performed by using the four input lines, A0 to A3, to select the output lines Y0 to Y15, and using one enable as the data input while holding the other enable low.
Description
The ’HC154 and ’HCT154 are 4- to 16-line decoders/demultiplexers with two enable inputs, E1 and E2. A High on either enable input forces the output into the High state. The demultiplexing function is performed by using the four input lines, A0 to A3, to select the output lines Y0 to Y15, and using one enable as the data input while holding the other enable low.
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