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Fairchild Semiconductor
DM74LS156MX Dual 2-Line to 4-Line Decoders/Demultiplexers

General Description
These TTL circuits feature dual 1-line-to-4-line demultiplexers with individual strobes and common binary-address inputs in a single 16-pin package. When both sections are enabled by the strobes, the common address inputs sequentially select and route associated input data to the appropriate output of each section. The individual strobes permit activating or inhibiting each of the 4-bit sections as desired. Data applied to input C1 is inverted at its outputs and data applied at C2 is true through its outputs. The inverter following the C1 data input permits use as a 3-to-8-line decoder, or 1-to-8-line demultiplexer, without external gating. Input clamping diodes are provided on these circuits to minimize transmission-line effects and simplify system design.

   Dual 2-to-4-line decoder
   Dual 1-to-4-line demultiplexer
   3-to-8-line decoder
   1-to-8-line demultiplexer
■Individual strobes simplify cascading for decoding or demultiplexing larger words
■Input clamping diodes simplify system design
■Choice of outputs:
   Totem-pole (DM74LS155)
   Open-collector (DM74LS156)

other parts : 74LS155  74LS156  DM74LS155  DM74LS155M  DM74LS155MX  DM74LS155N  DM74LS156  DM74LS156M  DM74LS156N  


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