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74LVTH125

  

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Philips
Philips Electronics
74LVTH125 3.3 V quad buffer; 3-state

General description
The 74LVT125; 74LVTH125 is a high-performance BiCMOS product designed for VCC operation at 3.3 V.
This device combines low static and dynamic power dissipation with high speed and high output drive. The 74LVT125; 74LVTH125 device is a quad buffer that is ideal for driving bus lines. The device features four output enable inputs (1OE, 2OE, 3OE and 4OE), each controlling one of the 3-state outputs.

Features
■ Quad bus interface
■ 3-state buffers
■ Output capability: +64 mA and −32 mA
■ TTL input and output switching levels
■ Input and output interface capability to systems at 5 V supply
■ Bus hold data inputs eliminate need for external pull-up resistors to hold unused inputs
■ Live insertion and extraction permitted
■ No bus current loading when output is tied to 5 V bus
■ Power-up 3-state
■ Latch-up protection:
   ◆ JESD78: exceeds 500 mA
■ ESD protection:
   ◆ MIL STD 883 method 3015: exceeds 2000 V
   ◆ Machine model: exceeds 200 V


other parts : 74LVT125  74LVT125BQ  74LVT125D  74LVT125DB  74LVT125PW  74LVT125PWDH  74LVTH125BQ  74LVTH125D  74LVTH125DB  74LVTH125PW  
74LVTH125 PDF
NXP
NXP Semiconductors.
74LVTH125 3.3 V quad buffer; 3-state

General description
The 74LVT125; 74LVTH125 is a high-performance BiCMOS product designed for VCC operation at 3.3 V.
This device combines low static and dynamic power dissipation with high speed and high output drive. The 74LVT125; 74LVTH125 device is a quad buffer that is ideal for driving bus lines. The device features four output enable inputs (1OE, 2OE, 3OE and 4OE), each controlling one of the 3-state outputs.

Features and benefits
■ Quad bus interface
■ 3-state buffers
■ Output capability: +64 mA and 32 mA
■ TTL input and output switching levels
■ Input and output interface capability to systems at 5 V supply
■ Bus hold data inputs eliminate need for external pull-up resistors to hold unused inputs
■ Live insertion and extraction permitted
■ No bus current loading when output is tied to 5 V bus
■ Power-up 3-state
■ Latch-up protection:
   ♦ JESD78: exceeds 500 mA
■ ESD protection:
   ♦ MIL STD 883 method 3015: exceeds 2000 V
   ♦ Machine model: exceeds 200 V


other parts : 74LVT125  74LVT125BQ  74LVT125BQ-G  74LVT125D  74LVT125D/AUJ  74LVT125DB  74LVT125PW  74LVT125PW/AUJ  74LVTH125BQ  74LVTH125BQ-G  
74LVTH125 PDF
Fairchild
Fairchild Semiconductor
74LVTH125 Low Voltage Quad Buffer with 3-STATE Outputs

General Description
The LVTH125 contains four independent non-inverting buffers with 3-STATE outputs.
These buffers are designed for low-voltage (3.3V) VCC applications, but with the capability to provide a TTL interface to a 5V environment. The LVTH125 is fabricated with an advanced BiCMOS technology to achieve high speed operation similar to 5V ABT while maintaining a low power dissipation.

Features
■ Input and output interface capability to systems at 5V VCC
■ Bushold data inputs eliminate the need for external
   pull-up resistors to hold unused inputs
■ Live insertion/extraction permitted
■ Power Up/Down high impedance provides glitch-free bus loading
■ Outputs source/sink –32mA/+64mA
■ Functionally compatible with the 74 series 125
■ Latch-up performance exceeds 500mA
■ ESD performance:
   – Human-body model > 2000V
   – Machine model > 200V
   – Charged-device model > 1000V


other parts : 74LVTH125M  74LVTH125SJ  74LVTH125MTC  74LVTH125MX  74LVTH125SJX  74LVTH125MTCX  
74LVTH125 PDF
ETC3
Unspecified
74LVTH125 3.3 V quad buffer; 3-state

[nexperia]

General description
The 74LVT125; 74LVTH125 is a high-performance BiCMOS product designed for VCC operation at 3.3 V.
This device combines low static and dynamic power dissipation with high speed and high output drive. The 74LVT125; 74LVTH125 device is a quad buffer that is ideal for driving bus lines. The device features four output enable inputs (1OE, 2OE, 3OE and 4OE), each controlling one of the 3-state outputs.

Features and benefits
■ Quad bus interface
■ 3-state buffers
■ Output capability: +64 mA and 32 mA
■ TTL input and output switching levels
■ Input and output interface capability to systems at 5 V supply
■ Bus hold data inputs eliminate need for external pull-up resistors to hold unused inputs
■ Live insertion and extraction permitted
■ No bus current loading when output is tied to 5 V bus
■ Power-up 3-state
■ Latch-up protection:
   ♦ JESD78: exceeds 500 mA
■ ESD protection:
   ♦ MIL STD 883 method 3015: exceeds 2000 V
   ♦ Machine model: exceeds 200 V


other parts : 74LVT125  74LVT125BQ  74LVT125D  74LVT125DB  74LVT125PW  74LVTH125BQ  74LVTH125D  74LVTH125DB  74LVTH125PW  
74LVTH125 PDF
ETC3
Unspecified
74LVTH125D 3.3 V quad buffer; 3-state

[nexperia]

General description
The 74LVT125; 74LVTH125 is a high-performance BiCMOS product designed for VCC operation at 3.3 V.
This device combines low static and dynamic power dissipation with high speed and high output drive. The 74LVT125; 74LVTH125 device is a quad buffer that is ideal for driving bus lines. The device features four output enable inputs (1OE, 2OE, 3OE and 4OE), each controlling one of the 3-state outputs.

Features and benefits
■ Quad bus interface
■ 3-state buffers
■ Output capability: +64 mA and 32 mA
■ TTL input and output switching levels
■ Input and output interface capability to systems at 5 V supply
■ Bus hold data inputs eliminate need for external pull-up resistors to hold unused inputs
■ Live insertion and extraction permitted
■ No bus current loading when output is tied to 5 V bus
■ Power-up 3-state
■ Latch-up protection:
   ♦ JESD78: exceeds 500 mA
■ ESD protection:
   ♦ MIL STD 883 method 3015: exceeds 2000 V
   ♦ Machine model: exceeds 200 V


other parts : 74LVT125  74LVT125BQ  74LVT125D  74LVT125DB  74LVT125PW  74LVTH125  74LVTH125BQ  74LVTH125DB  74LVTH125PW  
74LVTH125D PDF
Fairchild
Fairchild Semiconductor
74LVTH125M Low Voltage Quad Buffer with 3-STATE Outputs

General Description
The LVTH125 contains four independent non-inverting buffers with 3-STATE outputs.
These buffers are designed for low-voltage (3.3V) VCC applications, but with the capability to provide a TTL interface to a 5V environment. The LVTH125 is fabricated with an advanced BiCMOS technology to achieve high speed operation similar to 5V ABT while maintaining a low power dissipation.

Features
■ Input and output interface capability to systems at 5V VCC
■ Bushold data inputs eliminate the need for external
   pull-up resistors to hold unused inputs
■ Live insertion/extraction permitted
■ Power Up/Down high impedance provides glitch-free bus loading
■ Outputs source/sink –32mA/+64mA
■ Functionally compatible with the 74 series 125
■ Latch-up performance exceeds 500mA
■ ESD performance:
   – Human-body model > 2000V
   – Machine model > 200V
   – Charged-device model > 1000V


other parts : 74LVTH125  74LVTH125SJ  74LVTH125MTC  74LVTH125MX  74LVTH125SJX  74LVTH125MTCX  
74LVTH125M PDF
Philips
Philips Electronics
74LVTH125D 3.3 V quad buffer; 3-state

General description
The 74LVT125; 74LVTH125 is a high-performance BiCMOS product designed for VCC operation at 3.3 V.
This device combines low static and dynamic power dissipation with high speed and high output drive. The 74LVT125; 74LVTH125 device is a quad buffer that is ideal for driving bus lines. The device features four output enable inputs (1OE, 2OE, 3OE and 4OE), each controlling one of the 3-state outputs.

Features
■ Quad bus interface
■ 3-state buffers
■ Output capability: +64 mA and −32 mA
■ TTL input and output switching levels
■ Input and output interface capability to systems at 5 V supply
■ Bus hold data inputs eliminate need for external pull-up resistors to hold unused inputs
■ Live insertion and extraction permitted
■ No bus current loading when output is tied to 5 V bus
■ Power-up 3-state
■ Latch-up protection:
   ◆ JESD78: exceeds 500 mA
■ ESD protection:
   ◆ MIL STD 883 method 3015: exceeds 2000 V
   ◆ Machine model: exceeds 200 V


other parts : 74LVT125  74LVT125BQ  74LVT125D  74LVT125DB  74LVT125PW  74LVT125PWDH  74LVTH125  74LVTH125BQ  74LVTH125DB  74LVTH125PW  
74LVTH125D PDF
NXP
NXP Semiconductors.
74LVTH125D 3.3 V quad buffer; 3-state

General description
The 74LVT125; 74LVTH125 is a high-performance BiCMOS product designed for VCC operation at 3.3 V.
This device combines low static and dynamic power dissipation with high speed and high output drive. The 74LVT125; 74LVTH125 device is a quad buffer that is ideal for driving bus lines. The device features four output enable inputs (1OE, 2OE, 3OE and 4OE), each controlling one of the 3-state outputs.

Features and benefits
■ Quad bus interface
■ 3-state buffers
■ Output capability: +64 mA and 32 mA
■ TTL input and output switching levels
■ Input and output interface capability to systems at 5 V supply
■ Bus hold data inputs eliminate need for external pull-up resistors to hold unused inputs
■ Live insertion and extraction permitted
■ No bus current loading when output is tied to 5 V bus
■ Power-up 3-state
■ Latch-up protection:
   ♦ JESD78: exceeds 500 mA
■ ESD protection:
   ♦ MIL STD 883 method 3015: exceeds 2000 V
   ♦ Machine model: exceeds 200 V


other parts : 74LVT125  74LVT125BQ  74LVT125BQ-G  74LVT125D  74LVT125D/AUJ  74LVT125DB  74LVT125PW  74LVT125PW/AUJ  74LVTH125  74LVTH125BQ  
74LVTH125D PDF
ETC3
Unspecified
74LVTH125DB 3.3 V quad buffer; 3-state

[nexperia]

General description
The 74LVT125; 74LVTH125 is a high-performance BiCMOS product designed for VCC operation at 3.3 V.
This device combines low static and dynamic power dissipation with high speed and high output drive. The 74LVT125; 74LVTH125 device is a quad buffer that is ideal for driving bus lines. The device features four output enable inputs (1OE, 2OE, 3OE and 4OE), each controlling one of the 3-state outputs.

Features and benefits
■ Quad bus interface
■ 3-state buffers
■ Output capability: +64 mA and 32 mA
■ TTL input and output switching levels
■ Input and output interface capability to systems at 5 V supply
■ Bus hold data inputs eliminate need for external pull-up resistors to hold unused inputs
■ Live insertion and extraction permitted
■ No bus current loading when output is tied to 5 V bus
■ Power-up 3-state
■ Latch-up protection:
   ♦ JESD78: exceeds 500 mA
■ ESD protection:
   ♦ MIL STD 883 method 3015: exceeds 2000 V
   ♦ Machine model: exceeds 200 V


other parts : 74LVT125  74LVT125BQ  74LVT125D  74LVT125DB  74LVT125PW  74LVTH125  74LVTH125BQ  74LVTH125D  74LVTH125PW  
74LVTH125DB PDF
ETC3
Unspecified
74LVTH125BQ 3.3 V quad buffer; 3-state

[nexperia]

General description
The 74LVT125; 74LVTH125 is a high-performance BiCMOS product designed for VCC operation at 3.3 V.
This device combines low static and dynamic power dissipation with high speed and high output drive. The 74LVT125; 74LVTH125 device is a quad buffer that is ideal for driving bus lines. The device features four output enable inputs (1OE, 2OE, 3OE and 4OE), each controlling one of the 3-state outputs.

Features and benefits
■ Quad bus interface
■ 3-state buffers
■ Output capability: +64 mA and 32 mA
■ TTL input and output switching levels
■ Input and output interface capability to systems at 5 V supply
■ Bus hold data inputs eliminate need for external pull-up resistors to hold unused inputs
■ Live insertion and extraction permitted
■ No bus current loading when output is tied to 5 V bus
■ Power-up 3-state
■ Latch-up protection:
   ♦ JESD78: exceeds 500 mA
■ ESD protection:
   ♦ MIL STD 883 method 3015: exceeds 2000 V
   ♦ Machine model: exceeds 200 V


other parts : 74LVT125  74LVT125BQ  74LVT125D  74LVT125DB  74LVT125PW  74LVTH125  74LVTH125D  74LVTH125DB  74LVTH125PW  
74LVTH125BQ PDF
NXP
NXP Semiconductors.
74LVTH125PW 3.3 V quad buffer; 3-state

General description
The 74LVT125; 74LVTH125 is a high-performance BiCMOS product designed for VCC operation at 3.3 V.
This device combines low static and dynamic power dissipation with high speed and high output drive. The 74LVT125; 74LVTH125 device is a quad buffer that is ideal for driving bus lines. The device features four output enable inputs (1OE, 2OE, 3OE and 4OE), each controlling one of the 3-state outputs.

Features and benefits
■ Quad bus interface
■ 3-state buffers
■ Output capability: +64 mA and 32 mA
■ TTL input and output switching levels
■ Input and output interface capability to systems at 5 V supply
■ Bus hold data inputs eliminate need for external pull-up resistors to hold unused inputs
■ Live insertion and extraction permitted
■ No bus current loading when output is tied to 5 V bus
■ Power-up 3-state
■ Latch-up protection:
   ♦ JESD78: exceeds 500 mA
■ ESD protection:
   ♦ MIL STD 883 method 3015: exceeds 2000 V
   ♦ Machine model: exceeds 200 V


other parts : 74LVT125  74LVT125BQ  74LVT125BQ-G  74LVT125D  74LVT125D/AUJ  74LVT125DB  74LVT125PW  74LVT125PW/AUJ  74LVTH125  74LVTH125BQ  
74LVTH125PW PDF
Philips
Philips Electronics
74LVTH125DB 3.3 V quad buffer; 3-state

General description
The 74LVT125; 74LVTH125 is a high-performance BiCMOS product designed for VCC operation at 3.3 V.
This device combines low static and dynamic power dissipation with high speed and high output drive. The 74LVT125; 74LVTH125 device is a quad buffer that is ideal for driving bus lines. The device features four output enable inputs (1OE, 2OE, 3OE and 4OE), each controlling one of the 3-state outputs.

Features
■ Quad bus interface
■ 3-state buffers
■ Output capability: +64 mA and −32 mA
■ TTL input and output switching levels
■ Input and output interface capability to systems at 5 V supply
■ Bus hold data inputs eliminate need for external pull-up resistors to hold unused inputs
■ Live insertion and extraction permitted
■ No bus current loading when output is tied to 5 V bus
■ Power-up 3-state
■ Latch-up protection:
   ◆ JESD78: exceeds 500 mA
■ ESD protection:
   ◆ MIL STD 883 method 3015: exceeds 2000 V
   ◆ Machine model: exceeds 200 V


other parts : 74LVT125  74LVT125BQ  74LVT125D  74LVT125DB  74LVT125PW  74LVT125PWDH  74LVTH125  74LVTH125BQ  74LVTH125D  74LVTH125PW  
74LVTH125DB PDF

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