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74LVT374D

  

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NXP
NXP Semiconductors.
74LVT374D 3.3 V octal D-type flip-flop; 3-state

General description
The 74LVT374 is a high-performance product designed for VCC operation at 3.3 V.
This device is an 8-bit, edge triggered register coupled to eight 3-state output buffers. The two sections of the device are controlled independently by the clock (pin CP) and output enable (pin OE) control gates. The state of each Dn input (one setup time before the LOW-to-HIGH clock transition) is transferred to the corresponding flip-flops Qn output.
The 3-state output buffers are designed to drive heavily loaded 3-state buses, MOS memories, or MOS microprocessors.

Features and benefits
■ Inputs and outputs arranged for easy interfacing to microprocessors
■ 3-state outputs for bus interfacing
■ Common output enable control
■ TTL input and output switching levels
■ Input and output interface capability to systems at 5 V supply
■ Bus hold data inputs eliminate need for external pull-up resistors to hold unused inputs
■ Live insertion and extraction permitted
■ No bus current loading when output is tied to 5 V bus
■ Power-up reset
■ Power-up 3-state
■ Latch-up protection
   ♦ JESD78 class II exceeds 500 mA
■ ESD protection:
   ♦ HBM JESD22-A114E exceeds 2000 V
   ♦ MM JESD22-A115-A exceeds 200 V
■ Specified from -40°C to +85°C

 


other parts : 74LVT374  74LVT374DB  74LVT374PW  
74LVT374D PDF
Philips
Philips Electronics
74LVT374D 3.3V Octal D-type flip-flop; positive-edge trigger (3-State)

DESCRIPTION
The 74LVT374 high-performance BiCMOS device combines low static and dynamic power dissipation with high speed and high output drive.
The 74LVT374 is an 8-bit, edge triggered register coupled to eight 3-State output buffers. The two sections of the device are controlled independently by the clock (CP) and Output Enable (OE) control gates.

FEATURES
• Inputs and outputs on opposite side of package allow easy interface to microprocessors
• 3-State outputs for bus interfacing
• Common output enable
• TTL input and output switching levels
• Input and output interface capability to systems at 5V supply
• Bus-hold data inputs eliminate the need for external pull-up resistors to hold unused inputs
• Live insertion/extraction permitted
• No bus current loading when output is tied to 5V bus
• Power-up 3-State
• Power-up reset
• Latch-up protection exceeds 500mA per JEDEC Std 17
• ESD protection exceeds 2000V per MIL STD 883 Method 3015 and 200V per Machine Model

 


other parts : 74LVT374  74LVT374DB  74LVT374PW  74LVT374PWDH  
74LVT374D PDF
NXP
NXP Semiconductors.
74LVT374DB 3.3 V octal D-type flip-flop; 3-state

General description
The 74LVT374 is a high-performance product designed for VCC operation at 3.3 V.
This device is an 8-bit, edge triggered register coupled to eight 3-state output buffers. The two sections of the device are controlled independently by the clock (pin CP) and output enable (pin OE) control gates. The state of each Dn input (one setup time before the LOW-to-HIGH clock transition) is transferred to the corresponding flip-flops Qn output.
The 3-state output buffers are designed to drive heavily loaded 3-state buses, MOS memories, or MOS microprocessors.

Features and benefits
■ Inputs and outputs arranged for easy interfacing to microprocessors
■ 3-state outputs for bus interfacing
■ Common output enable control
■ TTL input and output switching levels
■ Input and output interface capability to systems at 5 V supply
■ Bus hold data inputs eliminate need for external pull-up resistors to hold unused inputs
■ Live insertion and extraction permitted
■ No bus current loading when output is tied to 5 V bus
■ Power-up reset
■ Power-up 3-state
■ Latch-up protection
   ♦ JESD78 class II exceeds 500 mA
■ ESD protection:
   ♦ HBM JESD22-A114E exceeds 2000 V
   ♦ MM JESD22-A115-A exceeds 200 V
■ Specified from -40°C to +85°C

 


other parts : 74LVT374  74LVT374D  74LVT374PW  
74LVT374DB PDF
Philips
Philips Electronics
74LVT374DB 3.3V Octal D-type flip-flop; positive-edge trigger (3-State)

DESCRIPTION
The 74LVT374 high-performance BiCMOS device combines low static and dynamic power dissipation with high speed and high output drive.
The 74LVT374 is an 8-bit, edge triggered register coupled to eight 3-State output buffers. The two sections of the device are controlled independently by the clock (CP) and Output Enable (OE) control gates.

FEATURES
• Inputs and outputs on opposite side of package allow easy interface to microprocessors
• 3-State outputs for bus interfacing
• Common output enable
• TTL input and output switching levels
• Input and output interface capability to systems at 5V supply
• Bus-hold data inputs eliminate the need for external pull-up resistors to hold unused inputs
• Live insertion/extraction permitted
• No bus current loading when output is tied to 5V bus
• Power-up 3-State
• Power-up reset
• Latch-up protection exceeds 500mA per JEDEC Std 17
• ESD protection exceeds 2000V per MIL STD 883 Method 3015 and 200V per Machine Model

 


other parts : 74LVT374  74LVT374D  74LVT374PW  74LVT374PWDH  
74LVT374DB PDF

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