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54AC16373

  

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ST-Microelectronics
STMicroelectronics
54AC16373 Rad-hard advanced high-speed 5 V CMOS logic series

Description
The 54AC and 54ACT series represent over 60 product types with different high-speed CMOS functions, specifically designed to meet the radiation requirements of the aerospace industry. They include a large set of gates, flip-flops, multiplexers, counters, bus interfaces, and several other functions. Their radiation hardness, immunity from single event latch-up (SEL) and single event upset (SEU), and housing in hermetic packages make them suitable for the most difficult environmental conditions. The complete specification for each type is available from the DSCC web site: www.dscc.dla.mil. STMicroelectronics guarantees full compliance of qualified parts with these DSCC specifications.

Features
■ 2 to 6 V operating voltage
■ High speed TPD = 4.5 ns (typ.)
■ Low DC power dissipation: 8 µA max.
■ Symmetrical 24 mA output characteristics
■ High noise immunity: 28% of min. VCC
■ Power-down input protection
■ Balanced propagation delays
■ Improved electrical latch-up immunity
■ Controlled rise and fall times
■ Operating temperature: - 55 to 150 °C
■ Hermetic packages
■ Rad-hard: 300 kRad TID at any Mil1019 dose rates
■ SEL immune to 110 MeV/cm²/mg LET ions
■ RHA QML-V qualified
■ Same die and electrical specification for engineering and flight models

 


other parts : 54AC00  54AC02  54AC04  54AC08  54AC10  54AC11  54AC138  54AC139  54AC14  54AC151  
54AC16373 PDF
TI
Texas Instruments
54AC16373 16-BIT TRANSPARENT D-TYPE LATCHES

description
The ’AC16373 are 16-bit transparent D-type latches with 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. They are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers. The device can be used as two 8-bit latches or one 16-bit latch. When the latch-enable (LE) input is high, the Q outputs follow the data (D) inputs. When LE is taken low, the Q outputs are latched at the levels set up at the D inputs.
A buffered output-enable (OE) input can be used to place the eight outputs in either a normal logic state (high or low logic levels) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and the increased drive provide the capability to drive bus lines without need for interface or pullup components. OE does not affect internal operations of the latch. Old data can be retained or new data can be entered while the outputs are in the high-impedance state.
The 74AC16373 is packaged in TI’s shrink small-outline package (DL), which provides twice the I/O pin count and functionality of standard small-outline packages in the same printed-circuit-board area.
The 54AC16373 is characterized for operation over the full military temperature range of –55°C to 125°C. The 74AC16373 is characterized for operation from –40°C to 85°C.

● Members of the Texas Instruments Widebus™ Family
● 3-State True Outputs
● Full Parallel Access for Loading
● Flow-Through Architecture Optimizes PCB Layout
● Distributed VCC and GND Pin Configuration Minimizes High-Speed Switching Noise
● EPIC™ (Enhanced-Performance Implanted CMOS) 1-µm Process
● 500-mA Typical Latch-Up Immunity at 125°C
● Package Options Include Plastic 300-mil
   Shrink Small-Outline (DL) Packages Using
   25-mil Center-to-Center Pin Spacings and
   380-mil Fine-Pitch Ceramic Flat (WD)
   Packages Using 25-mil Center-to-Center
   Pin Spacings


other parts : 54AC16373WD  74AC16373  74AC16373DL  74AC16373DLG4  74AC16373DLR  74AC16373DLRG4  
54AC16373 PDF
TI
Texas Instruments
54AC16373WD 16-BIT TRANSPARENT D-TYPE LATCHES

description
The ’AC16373 are 16-bit transparent D-type latches with 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. They are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers. The device can be used as two 8-bit latches or one 16-bit latch. When the latch-enable (LE) input is high, the Q outputs follow the data (D) inputs. When LE is taken low, the Q outputs are latched at the levels set up at the D inputs.
A buffered output-enable (OE) input can be used to place the eight outputs in either a normal logic state (high or low logic levels) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and the increased drive provide the capability to drive bus lines without need for interface or pullup components. OE does not affect internal operations of the latch. Old data can be retained or new data can be entered while the outputs are in the high-impedance state.
The 74AC16373 is packaged in TI’s shrink small-outline package (DL), which provides twice the I/O pin count and functionality of standard small-outline packages in the same printed-circuit-board area.
The 54AC16373 is characterized for operation over the full military temperature range of –55°C to 125°C. The 74AC16373 is characterized for operation from –40°C to 85°C.

● Members of the Texas Instruments Widebus™ Family
● 3-State True Outputs
● Full Parallel Access for Loading
● Flow-Through Architecture Optimizes PCB Layout
● Distributed VCC and GND Pin Configuration Minimizes High-Speed Switching Noise
● EPIC™ (Enhanced-Performance Implanted CMOS) 1-µm Process
● 500-mA Typical Latch-Up Immunity at 125°C
● Package Options Include Plastic 300-mil
   Shrink Small-Outline (DL) Packages Using
   25-mil Center-to-Center Pin Spacings and
   380-mil Fine-Pitch Ceramic Flat (WD)
   Packages Using 25-mil Center-to-Center
   Pin Spacings


other parts : 54AC16373  74AC16373  74AC16373DL  74AC16373DLG4  74AC16373DLR  74AC16373DLRG4  
54AC16373WD PDF

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