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54AC109

  

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National-Semiconductor
National ->Texas Instruments
54AC109 Dual JK Positive Edge-Triggered Flip-Flop

General Description
The ’AC/’ACT109 consists of two high-speed completely in dependent transition clocked JK flip-flops. The clocking operation is independent of rise and fall times of the clock waveform. The JK design allows operation as a D flip-flop (refer to ’AC/’ACT74 data sheet) by connecting the J and K inputs together.

Asynchronous Inputs:
  LOW input to SD (Set) sets Q to HIGH level
  LOW input to CD (Clear) sets Q to LOW level
  Clear and Set are independent of clock
  Simultaneous LOW on CD and SD makes both Q and Q HIGH

Features
■ ICC reduced by 50%
■ Outputs source/sink 24 mA
■ ’ACT109 has TTL-compatible inputs
■ Standard Military Drawing (SMD)
   — ’AC109: 5962-89551
   — ’ACT109: 5962-88534

 


other parts : 54AC109D  54AC109DMQB  54AC109F  54AC109FMQB  54AC109L  54AC109LMQB  54AC109MDS  54ACT109  54ACT109D  54ACT109DMQB  
54AC109 PDF
UTMC
Aeroflex UTMC
54AC109 RadHard MSI Logic SMD Cross Reference

RadHard MSI Logic SMD Cross Reference

(UTMC Harris National)


other parts : 54AC00  54AC02  54AC04  54AC08  54AC10  54AC11  54AC138  54AC139  54AC14  54AC151  
54AC109 PDF
National-Semiconductor
National ->Texas Instruments
54AC109L Dual JK Positive Edge-Triggered Flip-Flop

General Description
The ’AC/’ACT109 consists of two high-speed completely in dependent transition clocked JK flip-flops. The clocking operation is independent of rise and fall times of the clock waveform. The JK design allows operation as a D flip-flop (refer to ’AC/’ACT74 data sheet) by connecting the J and K inputs together.

Asynchronous Inputs:
  LOW input to SD (Set) sets Q to HIGH level
  LOW input to CD (Clear) sets Q to LOW level
  Clear and Set are independent of clock
  Simultaneous LOW on CD and SD makes both Q and Q HIGH

Features
■ ICC reduced by 50%
■ Outputs source/sink 24 mA
■ ’ACT109 has TTL-compatible inputs
■ Standard Military Drawing (SMD)
   — ’AC109: 5962-89551
   — ’ACT109: 5962-88534

 


other parts : 54AC109  54AC109D  54AC109DMQB  54AC109F  54AC109FMQB  54AC109LMQB  54AC109MDS  54ACT109  54ACT109D  54ACT109DMQB  
54AC109L PDF
National-Semiconductor
National ->Texas Instruments
54AC109F Dual JK Positive Edge-Triggered Flip-Flop

General Description
The ’AC/’ACT109 consists of two high-speed completely in dependent transition clocked JK flip-flops. The clocking operation is independent of rise and fall times of the clock waveform. The JK design allows operation as a D flip-flop (refer to ’AC/’ACT74 data sheet) by connecting the J and K inputs together.

Asynchronous Inputs:
  LOW input to SD (Set) sets Q to HIGH level
  LOW input to CD (Clear) sets Q to LOW level
  Clear and Set are independent of clock
  Simultaneous LOW on CD and SD makes both Q and Q HIGH

Features
■ ICC reduced by 50%
■ Outputs source/sink 24 mA
■ ’ACT109 has TTL-compatible inputs
■ Standard Military Drawing (SMD)
   — ’AC109: 5962-89551
   — ’ACT109: 5962-88534

 


other parts : 54AC109  54AC109D  54AC109DMQB  54AC109FMQB  54AC109L  54AC109LMQB  54AC109MDS  54ACT109  54ACT109D  54ACT109DMQB  
54AC109F PDF
National-Semiconductor
National ->Texas Instruments
54AC109D Dual JK Positive Edge-Triggered Flip-Flop

General Description
The ’AC/’ACT109 consists of two high-speed completely in dependent transition clocked JK flip-flops. The clocking operation is independent of rise and fall times of the clock waveform. The JK design allows operation as a D flip-flop (refer to ’AC/’ACT74 data sheet) by connecting the J and K inputs together.

Asynchronous Inputs:
  LOW input to SD (Set) sets Q to HIGH level
  LOW input to CD (Clear) sets Q to LOW level
  Clear and Set are independent of clock
  Simultaneous LOW on CD and SD makes both Q and Q HIGH

Features
■ ICC reduced by 50%
■ Outputs source/sink 24 mA
■ ’ACT109 has TTL-compatible inputs
■ Standard Military Drawing (SMD)
   — ’AC109: 5962-89551
   — ’ACT109: 5962-88534

 


other parts : 54AC109  54AC109DMQB  54AC109F  54AC109FMQB  54AC109L  54AC109LMQB  54AC109MDS  54ACT109  54ACT109D  54ACT109DMQB  
54AC109D PDF
National-Semiconductor
National ->Texas Instruments
54AC109MDS Dual JK Positive Edge-Triggered Flip-Flop

General Description
The ’AC/’ACT109 consists of two high-speed completely in dependent transition clocked JK flip-flops. The clocking operation is independent of rise and fall times of the clock waveform. The JK design allows operation as a D flip-flop (refer to ’AC/’ACT74 data sheet) by connecting the J and K inputs together.

Asynchronous Inputs:
  LOW input to SD (Set) sets Q to HIGH level
  LOW input to CD (Clear) sets Q to LOW level
  Clear and Set are independent of clock
  Simultaneous LOW on CD and SD makes both Q and Q HIGH

Features
■ ICC reduced by 50%
■ Outputs source/sink 24 mA
■ ’ACT109 has TTL-compatible inputs
■ Standard Military Drawing (SMD)
   — ’AC109: 5962-89551
   — ’ACT109: 5962-88534

 


other parts : 54AC109  54AC109D  54AC109DMQB  54AC109F  54AC109FMQB  54AC109L  54AC109LMQB  54ACT109  54ACT109D  54ACT109DMQB  
54AC109MDS PDF
National-Semiconductor
National ->Texas Instruments
54AC109FMQB Dual JK Positive Edge-Triggered Flip-Flop

General Description
The ’AC/’ACT109 consists of two high-speed completely in dependent transition clocked JK flip-flops. The clocking operation is independent of rise and fall times of the clock waveform. The JK design allows operation as a D flip-flop (refer to ’AC/’ACT74 data sheet) by connecting the J and K inputs together.

Asynchronous Inputs:
  LOW input to SD (Set) sets Q to HIGH level
  LOW input to CD (Clear) sets Q to LOW level
  Clear and Set are independent of clock
  Simultaneous LOW on CD and SD makes both Q and Q HIGH

Features
■ ICC reduced by 50%
■ Outputs source/sink 24 mA
■ ’ACT109 has TTL-compatible inputs
■ Standard Military Drawing (SMD)
   — ’AC109: 5962-89551
   — ’ACT109: 5962-88534

 


other parts : 54AC109  54AC109D  54AC109DMQB  54AC109F  54AC109L  54AC109LMQB  54AC109MDS  54ACT109  54ACT109D  54ACT109DMQB  
54AC109FMQB PDF
National-Semiconductor
National ->Texas Instruments
54AC109DMQB Dual JK Positive Edge-Triggered Flip-Flop

General Description
The ’AC/’ACT109 consists of two high-speed completely in dependent transition clocked JK flip-flops. The clocking operation is independent of rise and fall times of the clock waveform. The JK design allows operation as a D flip-flop (refer to ’AC/’ACT74 data sheet) by connecting the J and K inputs together.

Asynchronous Inputs:
  LOW input to SD (Set) sets Q to HIGH level
  LOW input to CD (Clear) sets Q to LOW level
  Clear and Set are independent of clock
  Simultaneous LOW on CD and SD makes both Q and Q HIGH

Features
■ ICC reduced by 50%
■ Outputs source/sink 24 mA
■ ’ACT109 has TTL-compatible inputs
■ Standard Military Drawing (SMD)
   — ’AC109: 5962-89551
   — ’ACT109: 5962-88534

 


other parts : 54AC109  54AC109D  54AC109F  54AC109FMQB  54AC109L  54AC109LMQB  54AC109MDS  54ACT109  54ACT109D  54ACT109DMQB  
54AC109DMQB PDF
National-Semiconductor
National ->Texas Instruments
54AC109LMQB Dual JK Positive Edge-Triggered Flip-Flop

General Description
The ’AC/’ACT109 consists of two high-speed completely in dependent transition clocked JK flip-flops. The clocking operation is independent of rise and fall times of the clock waveform. The JK design allows operation as a D flip-flop (refer to ’AC/’ACT74 data sheet) by connecting the J and K inputs together.

Asynchronous Inputs:
  LOW input to SD (Set) sets Q to HIGH level
  LOW input to CD (Clear) sets Q to LOW level
  Clear and Set are independent of clock
  Simultaneous LOW on CD and SD makes both Q and Q HIGH

Features
■ ICC reduced by 50%
■ Outputs source/sink 24 mA
■ ’ACT109 has TTL-compatible inputs
■ Standard Military Drawing (SMD)
   — ’AC109: 5962-89551
   — ’ACT109: 5962-88534

 


other parts : 54AC109  54AC109D  54AC109DMQB  54AC109F  54AC109FMQB  54AC109L  54AC109MDS  54ACT109  54ACT109D  54ACT109DMQB  
54AC109LMQB PDF

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