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54AC10

  

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National-Semiconductor
National ->Texas Instruments
54AC10 Triple 3-Input NAND Gate

Acquired by Texas Instruments on September 23rd, 2011.

General Description
The ’AC10 contains three, 3-input NAND gates.

Features
■ ICC reduced by 50% on 54AC only
■ Outputs source/sink 24 mA
■ Standard Military Drawing (SMD)
   — ’AC10: 5962-87610
■ For Military 54ACT10 device see the 54ACTQ10

 


other parts : 54AC10D  54AC10F  54AC10L  
54AC10 PDF
UTMC
Aeroflex UTMC
54AC10 RadHard MSI Logic SMD Cross Reference

RadHard MSI Logic SMD Cross Reference

(UTMC Harris National)


other parts : 54AC00  54AC02  54AC04  54AC08  54AC109  54AC11  54AC138  54AC139  54AC14  54AC151  
54AC10 PDF
ST-Microelectronics
STMicroelectronics
54AC10 Rad-hard advanced high-speed 5 V CMOS logic series

Description
The 54AC and 54ACT series represent over 60 product types with different high-speed CMOS functions, specifically designed to meet the radiation requirements of the aerospace industry. They include a large set of gates, flip-flops, multiplexers, counters, bus interfaces, and several other functions. Their radiation hardness, immunity from single event latch-up (SEL) and single event upset (SEU), and housing in hermetic packages make them suitable for the most difficult


other parts : 54AC00  54AC02  54AC04  54AC08  54AC11  54AC138  54AC139  54AC14  54AC151  54AC157  
54AC10 PDF
National-Semiconductor
National ->Texas Instruments
54AC10F Triple 3-Input NAND Gate

Acquired by Texas Instruments on September 23rd, 2011.

General Description
The ’AC10 contains three, 3-input NAND gates.

Features
■ ICC reduced by 50% on 54AC only
■ Outputs source/sink 24 mA
■ Standard Military Drawing (SMD)
   — ’AC10: 5962-87610
■ For Military 54ACT10 device see the 54ACTQ10

 


other parts : 54AC10  54AC10D  54AC10L  
54AC10F PDF
National-Semiconductor
National ->Texas Instruments
54AC109 Dual JK Positive Edge-Triggered Flip-Flop

General Description
The ’AC/’ACT109 consists of two high-speed completely in dependent transition clocked JK flip-flops. The clocking operation is independent of rise and fall times of the clock waveform. The JK design allows operation as a D flip-flop (refer to ’AC/’ACT74 data sheet) by connecting the J and K inputs together.

Asynchronous Inputs:
  LOW input to SD (Set) sets Q to HIGH level
  LOW input to CD (Clear) sets Q to


other parts : 54AC109D  54AC109DMQB  54AC109F  54AC109FMQB  54AC109L  54AC109LMQB  54AC109MDS  54ACT109  54ACT109D  54ACT109DMQB  
54AC109 PDF
National-Semiconductor
National ->Texas Instruments
54AC10L Triple 3-Input NAND Gate

Acquired by Texas Instruments on September 23rd, 2011.

General Description
The ’AC10 contains three, 3-input NAND gates.

Features
■ ICC reduced by 50% on 54AC only
■ Outputs source/sink 24 mA
■ Standard Military Drawing (SMD)
   — ’AC10: 5962-87610
■ For Military 54ACT10 device see the 54ACTQ10

 


other parts : 54AC10  54AC10D  54AC10F  
54AC10L PDF
National-Semiconductor
National ->Texas Instruments
54AC10D Triple 3-Input NAND Gate

Acquired by Texas Instruments on September 23rd, 2011.

General Description
The ’AC10 contains three, 3-input NAND gates.

Features
■ ICC reduced by 50% on 54AC only
■ Outputs source/sink 24 mA
■ Standard Military Drawing (SMD)
   — ’AC10: 5962-87610
■ For Military 54ACT10 device see the 54ACTQ10

 


other parts : 54AC10  54AC10F  54AC10L  
54AC10D PDF
UTMC
Aeroflex UTMC
54AC109 RadHard MSI Logic SMD Cross Reference

RadHard MSI Logic SMD Cross Reference

(UTMC Harris National)


other parts : 54AC00  54AC02  54AC04  54AC08  54AC10  54AC11  54AC138  54AC139  54AC14  54AC151  
54AC109 PDF
National-Semiconductor
National ->Texas Instruments
54AC109L Dual JK Positive Edge-Triggered Flip-Flop

General Description
The ’AC/’ACT109 consists of two high-speed completely in dependent transition clocked JK flip-flops. The clocking operation is independent of rise and fall times of the clock waveform. The JK design allows operation as a D flip-flop (refer to ’AC/’ACT74 data sheet) by connecting the J and K inputs together.

Asynchronous Inputs:
  LOW input to SD (Set) sets Q to HIGH level
  LOW input to CD (Clear) sets Q to


other parts : 54AC109  54AC109D  54AC109DMQB  54AC109F  54AC109FMQB  54AC109LMQB  54AC109MDS  54ACT109  54ACT109D  54ACT109DMQB  
54AC109L PDF
National-Semiconductor
National ->Texas Instruments
54AC109F Dual JK Positive Edge-Triggered Flip-Flop

General Description
The ’AC/’ACT109 consists of two high-speed completely in dependent transition clocked JK flip-flops. The clocking operation is independent of rise and fall times of the clock waveform. The JK design allows operation as a D flip-flop (refer to ’AC/’ACT74 data sheet) by connecting the J and K inputs together.

Asynchronous Inputs:
  LOW input to SD (Set) sets Q to HIGH level
  LOW input to CD (Clear) sets Q to


other parts : 54AC109  54AC109D  54AC109DMQB  54AC109FMQB  54AC109L  54AC109LMQB  54AC109MDS  54ACT109  54ACT109D  54ACT109DMQB  
54AC109F PDF
National-Semiconductor
National ->Texas Instruments
54AC109D Dual JK Positive Edge-Triggered Flip-Flop

General Description
The ’AC/’ACT109 consists of two high-speed completely in dependent transition clocked JK flip-flops. The clocking operation is independent of rise and fall times of the clock waveform. The JK design allows operation as a D flip-flop (refer to ’AC/’ACT74 data sheet) by connecting the J and K inputs together.

Asynchronous Inputs:
  LOW input to SD (Set) sets Q to HIGH level
  LOW input to CD (Clear) sets Q to


other parts : 54AC109  54AC109DMQB  54AC109F  54AC109FMQB  54AC109L  54AC109LMQB  54AC109MDS  54ACT109  54ACT109D  54ACT109DMQB  
54AC109D PDF
National-Semiconductor
National ->Texas Instruments
54AC109MDS Dual JK Positive Edge-Triggered Flip-Flop

General Description
The ’AC/’ACT109 consists of two high-speed completely in dependent transition clocked JK flip-flops. The clocking operation is independent of rise and fall times of the clock waveform. The JK design allows operation as a D flip-flop (refer to ’AC/’ACT74 data sheet) by connecting the J and K inputs together.

Asynchronous Inputs:
  LOW input to SD (Set) sets Q to HIGH level
  LOW input to CD (Clear) sets Q to


other parts : 54AC109  54AC109D  54AC109DMQB  54AC109F  54AC109FMQB  54AC109L  54AC109LMQB  54ACT109  54ACT109D  54ACT109DMQB  
54AC109MDS PDF

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