General Description
The VCXH162240 contains sixteen inverting buffers with 3-STATE outputs to be employed as a memory and address driver, clock driver, or bus oriented transmitter/receiver.
The device is nibble (4-bit) controlled. Each nibble has separate 3-STATE control inputs which can be shorted together for full 16-bit operation.
The VCXH162240 data inputs include active bushold circuitry, eliminating the need for external pull-up resistors to hold unused or floating data inputs at a valid logic level.
The 74VCXH162240 is also designed with 26Ω series resistors in the outputs. This design reduces line noise in applications such as memory address drivers, clock drivers, and bus transceivers/transmitters.
The 74VCXH162240 is designed for low voltage (1.65V to 3.6V) VCC applications with output capability up to 3.6V.
The 74VCXH162240 is fabricated with an advanced CMOS technology to achieve high speed operation while maintaining low CMOS power dissipation.

Features
■ 1.65V–3.6V VCC supply operation
■ 3.6V tolerant control inputs and outputs
■ Bushold on data inputs eliminating the need for external pull-up/pull-down resistors
■ 26Ω series resistors in outputs
■ tPD
   3.3 ns max for 3.0V to 3.6V VCC
   3.8 ns max for 2.3V to 2.7V VCC
   7.6 ns max for 1.65V to 1.95V VCC
■ Static Drive (IOH/IOL)
   ±12 mA @ 3.0V VCC
   ±8 mA @ 2.3V VCC
   ±3 mA @ 1.65V VCC
■ Uses patented noise/EMI reduction circuitry
■ Latch-up performance exceeds 300 mA
■ ESD performance:
   Human body model > 2000V
   Machine model > 200V

DESCRIPTION
The 74VCXH162240 is a low voltage CMOS 16 BIT BUS BUFFER (INVERTED) fabricated with sub-micron silicon gate and five-layer metal wiring C2MOS technology. It is ideal for low power and very high speed 2.3 to 3.6V applications; it can be interfaced to 3.6V signal environment for both inputs and outputs.
Any nG output control governs four BUS BUFFERS. Output Enable input (nG) tied together gives full 16-bit operation. When nG is LOW, the outputs are on. When nG is HIGH, the output are in high impedance state. This device is designed to be used with 3 state memory address drivers, etc. Bus hold on data inputs is provided in order to eliminate the need for external pull-up or pull-down resistor.
The device circuits is including 26Ω series resistance in the outputs. These resistors permit to reduce line noise in high speed applications. All inputs and outputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage.

■ 3.6V TOLERANT INPUTS AND OUTPUTS
■ HIGH SPEED :
   tPD = 3.4 ns (MAX.) at VCC = 3.0 to 3.6V
   tPD = 3.8 ns (MAX.) at VCC = 2.3 to 2.7V
■ POWER DOWN PROTECTION ON INPUTS AND OUTPUTS
■ SYMMETRICAL OUTPUT IMPEDANCE:
   |IOH| = IOL = 12mA (MIN) at VCC = 3.0V
   |IOH| = IOL = 8mA (MIN) at VCC = 2.3V
■ 26Ω SERIE RESISTORS IN OUTPUTS
■ OPERATING VOLTAGE RANGE:
   VCC(OPR) = 2.3V to 3.6V
■ PIN AND FUNCTION COMPATIBLE WITH 74 SERIES H162240
■ BUS HOLD PROVIDED ON DATA INPUTS
■ LATCH-UP PERFORMANCE EXCEEDS 300mA (JESD 17)
■ ESD PERFORMANCE:
   HBM > 2000V (MIL STD 883 method 3015);
   MM > 200V

General Description
The VCXH162240 contains sixteen inverting buffers with 3-STATE outputs to be employed as a memory and address driver, clock driver, or bus oriented transmitter/receiver.
The device is nibble (4-bit) controlled. Each nibble has separate 3-STATE control inputs which can be shorted together for full 16-bit operation.
The VCXH162240 data inputs include active bushold circuitry, eliminating the need for external pull-up resistors to hold unused or floating data inputs at a valid logic level.
The 74VCXH162240 is also designed with 26Ω series resistors in the outputs. This design reduces line noise in applications such as memory address drivers, clock drivers, and bus transceivers/transmitters.
The 74VCXH162240 is designed for low voltage (1.65V to 3.6V) VCC applications with output capability up to 3.6V.
The 74VCXH162240 is fabricated with an advanced CMOS technology to achieve high speed operation while maintaining low CMOS power dissipation.

Features
■ 1.65V–3.6V VCC supply operation
■ 3.6V tolerant control inputs and outputs
■ Bushold on data inputs eliminating the need for external pull-up/pull-down resistors
■ 26Ω series resistors in outputs
■ tPD
   3.3 ns max for 3.0V to 3.6V VCC
   3.8 ns max for 2.3V to 2.7V VCC
   7.6 ns max for 1.65V to 1.95V VCC
■ Static Drive (IOH/IOL)
   ±12 mA @ 3.0V VCC
   ±8 mA @ 2.3V VCC
   ±3 mA @ 1.65V VCC
■ Uses patented noise/EMI reduction circuitry
■ Latch-up performance exceeds 300 mA
■ ESD performance:
   Human body model > 2000V
   Machine model > 200V

DESCRIPTION
The 74VCXH162240 is a low voltage CMOS 16 BIT BUS BUFFER (INVERTED) fabricated with sub-micron silicon gate and five-layer metal wiring C2MOS technology. It is ideal for low power and very high speed 2.3 to 3.6V applications; it can be interfaced to 3.6V signal environment for both inputs and outputs.
Any nG output control governs four BUS BUFFERS. Output Enable input (nG) tied together gives full 16-bit operation. When nG is LOW, the outputs are on. When nG is HIGH, the output are in high impedance state. This device is designed to be used with 3 state memory address drivers, etc. Bus hold on data inputs is provided in order to eliminate the need for external pull-up or pull-down resistor.
The device circuits is including 26Ω series resistance in the outputs. These resistors permit to reduce line noise in high speed applications. All inputs and outputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage.

■ 3.6V TOLERANT INPUTS AND OUTPUTS
■ HIGH SPEED :
   tPD = 3.4 ns (MAX.) at VCC = 3.0 to 3.6V
   tPD = 3.8 ns (MAX.) at VCC = 2.3 to 2.7V
■ POWER DOWN PROTECTION ON INPUTS AND OUTPUTS
■ SYMMETRICAL OUTPUT IMPEDANCE:
   |IOH| = IOL = 12mA (MIN) at VCC = 3.0V
   |IOH| = IOL = 8mA (MIN) at VCC = 2.3V
■ 26Ω SERIE RESISTORS IN OUTPUTS
■ OPERATING VOLTAGE RANGE:
   VCC(OPR) = 2.3V to 3.6V
■ PIN AND FUNCTION COMPATIBLE WITH 74 SERIES H162240
■ BUS HOLD PROVIDED ON DATA INPUTS
■ LATCH-UP PERFORMANCE EXCEEDS 300mA (JESD 17)
■ ESD PERFORMANCE:
   HBM > 2000V (MIL STD 883 method 3015);
   MM > 200V

General Description
The VCXH162240 contains sixteen inverting buffers with 3-STATE outputs to be employed as a memory and address driver, clock driver, or bus oriented transmitter/receiver.
The device is nibble (4-bit) controlled. Each nibble has separate 3-STATE control inputs which can be shorted together for full 16-bit operation.
The VCXH162240 data inputs include active bushold circuitry, eliminating the need for external pull-up resistors to hold unused or floating data inputs at a valid logic level.
The 74VCXH162240 is also designed with 26Ω series resistors in the outputs. This design reduces line noise in applications such as memory address drivers, clock drivers, and bus transceivers/transmitters.
The 74VCXH162240 is designed for low voltage (1.65V to 3.6V) VCC applications with output capability up to 3.6V.
The 74VCXH162240 is fabricated with an advanced CMOS technology to achieve high speed operation while maintaining low CMOS power dissipation.

Features
■ 1.65V–3.6V VCC supply operation
■ 3.6V tolerant control inputs and outputs
■ Bushold on data inputs eliminating the need for external pull-up/pull-down resistors
■ 26Ω series resistors in outputs
■ tPD
   3.3 ns max for 3.0V to 3.6V VCC
   3.8 ns max for 2.3V to 2.7V VCC
   7.6 ns max for 1.65V to 1.95V VCC
■ Static Drive (IOH/IOL)
   ±12 mA @ 3.0V VCC
   ±8 mA @ 2.3V VCC
   ±3 mA @ 1.65V VCC
■ Uses patented noise/EMI reduction circuitry
■ Latch-up performance exceeds 300 mA
■ ESD performance:
   Human body model > 2000V
   Machine model > 200V