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74AC377SJX

  

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Fairchild
Fairchild Semiconductor
74AC377SJX Octal D-Type Flip-Flop with Clock Enable

General Description
The AC/ACT377 has eight edge-triggered, D-type flip-flops with individual D inputs and Q outputs. The common buffered Clock (CP) input loads all flip-flops simultaneously, when the Clock Enable (CE) is LOW.
The register is fully edge-triggered. The state of each D input, one setup time before the LOW-to-HIGH clock transition, is transferred to the corresponding flip-flops Q output. The CE input must be stable only one setup time prior to the LOW-to-HIGH clock


other parts : 74AC377  74AC377MTC  74AC377SC  74AC377SJ  74ACT377  74ACT377MTC  74ACT377SC  74ACT377SJ  74AC377SCX  74AC377MTCX  
74AC377SJX PDF
Fairchild
Fairchild Semiconductor
74AC377SJX_05 Octal D-Type Flip-Flop with Clock Enable

General Description The AC/ACT377 has eight edge-triggered, D-type flip-flops with individual D inputs and Q outputs. The common buffered Clock (CP) input loads all flip-flops simultaneously, when the Clock Enable (CE) is LOW.
The register is fully edge-triggered. The state of each D input, one setup time before the LOW-to-HIGH clock transition, is transferred to the corresponding flip-flop’s Q output. The CE input must be stable only one setup time prior to the LOW-to-HIGH clock


other parts : 74AC377MTCX_NL  74AC377PC  74AC377PCX  74AC377_05  74ACT377_05  74AC377SC_05  74AC377SJ_05  74AC377MTC_05  74ACT377SC_05  74ACT377SJ_05  
74AC377SJX_05 PDF

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