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SN74ALVCHG162282 Datasheet PDF - Texas Instruments

Part NameDescriptionManufacturer
SN74ALVCHG162282 18-BIT TO 36-BIT REGISTERED BUS EXCHANGER WITH 3-STATE OUTPUTS TI
Texas Instruments TI
Other PDF  no available.
SN74ALVCHG162282 Datasheet PDF : SN74ALVCHG162282 pdf   
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DESCRIPTION
The SN74ALVCHG162282 is an 18-bit to 36-bit registered bus exchanger. This device is intended for use in applications where data must be transferred from a narrow high-speed bus to a wide lower-frequency bus. It is designed specifically for low-voltage (3.3-V) VCC operation.
The device provides synchronous data exchange between the two ports. Data is stored in the internal registers on the low-to-high transition of the clock (CLK) input. For data transfer in the B-to-A direction, the select (SEL) input selects 1B or 2B data for the A outputs.
For data transfer in the A-to-B direction, a two-stage pipeline is provided in the 1B path, with a single storage register in the 2B path. Data flow is controlled by the active-low output-enable (OE) and direction-control (DIR) input. DIR is registered to synchronize the bus direction changes with the clock.
The A-port N-channel output transistors are sized at 450 µm, and the P-channel output transistors are sized at 700 µm. All A-port outputs have equivalent 50-Ω series resistors. The B-port N-channel output transistors are sized at 225 µm, and the P-channel output transistors are sized at 560 µm. All B-port outputs have equivalent 20-Ω series resistors Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level. The switching characteristics are based on 25-pF (A port) and 80-pF (B port) loads, but are tested with the standard 50-pF load.
The SN74ALVCHG162282 is characterized for operation from 0°C to 70°C.

FEATURES
• Member of the Texas Instruments Widebus™ Family
• EPIC™ (Enhanced-Performance Implanted CMOS) Submicron Process
• A-Port Outputs Have Equivalent 50-Ω Series
   Resistors and B-Port Outputs Have Equivalent
   20-Ω Series Resistors, So No External
   Resistors Are Required
• ESD Protection Exceeds 2000 V Per
   MIL-STD-883, Method 3015; Exceeds 200 V
   Using Machine Model (C = 200 pF, R = 0)
• Latch-Up Performance Exceeds 250 mA Per JESD 17
• Bus Hold on Data Inputs Eliminates the Need
   for External Pullup/Pulldown Resistors
• Packaged in Thin Very Small-Outline Package

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