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LC240A Datasheet PDF - Texas Instruments

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Texas Instruments TI
LC240A Datasheet PDF : LC240A pdf   
SN74LVC240A image

This octal buffer/driver is designed for 1.65-V to 3.6-V VCC operation.
The SN74LVC240A is designed specifically to improve the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters.
This device is organized as two 4-bit buffers/drivers with separate output-enable (OE) inputs. When OE is low, the device passes data from the A inputs to the Y outputs. When OE is high, the outputs are in the high-impedance state.
Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of this device as a translator in a mixed 3.3-V/5-V system environment.
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

• Operates From 1.65 V to 3.6 V
• Inputs Accept Voltages to 5.5 V
• Max tpd of 6.5 ns at 3.3 V
• Typical VOLP (Output Ground Bounce)
   <0.8 V at VCC = 3.3 V, TA = 25°C
• Typical VOHV (Output VOH Undershoot)
   >2 V at VCC = 3.3 V, TA = 25°C
• Supports Mixed-Mode Signal Operation on All
   Ports (5-V Input/Output Voltage With
   3.3-V VCC)
• Ioff Supports Partial-Power-Down-Mode
• Latch-Up Performance Exceeds 250 mA Per
   JESD 17
• ESD Protection Exceeds JESD 22
   – 2000-V Human-Body Model (A114-A)
   – 200-V Machine Model (A115-A)
   – 1000-V Charged-Device Model (C101)

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