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74LV125A Datasheet PDF - Texas Instruments

Part NameDescriptionManufacturer
74LV125A QUADRUPLE BUS BUFFER GATES WITH 3-STATE OUTPUTS TI
Texas Instruments TI
Other PDF  no available.
74LV125A Datasheet PDF :   74LV125A pdf   
SN74LV125A image

The SN74LV125A quadruple bus buffer gate is designed for 2-V to 5.5-V VCC operation.

Features
• 2-V to 5.5-V VCC Operation
• Max tpd of 6 ns at 5 V
• Typical VOLP (Output Ground Bounce)
< 0.8 V at VCC= 3.3 V, TA= 25°C
• Typical VOHV(Output VOH Undershoot)
> 2.3 V at VCC = 3.3 V, TA = 25°C
• Support Mixed-Mode Voltage Operation on All Ports
• Ioff Supports Partial-Power-Down Mode Operation
• Latch-Up Performance Exceeds 250 mA Per JESD 17
• ESD Protection Exceeds JESD 22
– 4000-V Human-Body Model
– 200-V Machine Model
– 2000-V Charged-Device Model

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