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74V2G125STR Datasheet PDF - STMicroelectronics

Part NameDescriptionManufacturer
74V2G125STR DUAL BUS BUFFER (3-STATE) ST-Microelectronics
STMicroelectronics ST-Microelectronics
Other PDF  2003  
74V2G125STR Datasheet PDF : 74V2G125STR pdf   
74V2G125 image

DESCRIPTION
The 74V2G125 is an advanced high-speed CMOS DUAL BUS BUFFER fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS tecnology.
   
■ HIGH SPEED: tPD = 3.8ns (TYP.) at VCC = 5V
■ LOW POWER DISSIPATION:
    ICC = 1µA(MAX.) at TA=25°C
■ HIGH NOISE IMMUNITY:
    VNIH = VNIL = 28% VCC (MIN.)
■ POWER DOWN PROTECTION ON INPUTS
    AND OUTPUTS
■ SYMMETRICAL OUTPUT IMPEDANCE:
    |IOH| = IOL = 8mA (MIN) at VCC = 4.5V
■ BALANCED PROPAGATION DELAYS:
    tPLH ≅ tPHL
■ OPERATING VOLTAGE RANGE:
    VCC(OPR) = 2V to 5.5V
■ IMPROVED LATCH-UP IMMUNITY
   

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