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74LVX132TTR Datasheet PDF - STMicroelectronics

Part NameDescriptionManufacturer
74LVX132TTR LOW VOLTAGE CMOS QUAD 2-INPUT SCHMITT NAND GATE WITH 5V TOLERANT INPUTS ST-Microelectronics
STMicroelectronics ST-Microelectronics
Other PDF  2004  
74LVX132TTR Datasheet PDF : 74LVX132TTR pdf   
74LVX132MTR image

DESCRIPTION
The 74LVX132 is a low voltage CMOS QUAD 2-INPUT SCHMITT NAND GATE fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. It is ideal for low power, battery operated and low noise 3.3V applications. Power down protection is provided on all inputs and 0 to 7V can be accepted on inputs with no regard to the supply voltage.
   
■ HIGH SPEED :
    tPD = 5.9ns (TYP.) at VCC = 3.3V
■ 5V TOLERANT INPUTS
■ LOW POWER DISSIPATION:
    ICC = 2 µA (MAX.) at TA=25°C
■ TYPICAL HYSTERESIS : 0.7V at VCC = 3.3V
■ LOW NOISE:
    VOLP = 0.3V (TYP.) at VCC = 3.3V
■ SYMMETRICAL OUTPUT IMPEDANCE:
    |IOH| = IOL = 4mA (MIN)
■ BALANCED PROPAGATION DELAYS: tPLH ≅ tPHL
■ OPERATING VOLTAGE RANGE:
    VCC(OPR) = 2V to 3.6V (1.2V Data Retention)
■ PIN AND FUNCTION COMPATIBLE WITH
    74 SERIES 132
■ IMPROVED LATCH-UP IMMUNITY
■ POWER DOWN PROTECTION ON INPUTS
   

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